HD6417705F133BV Renesas Electronics America, HD6417705F133BV Datasheet - Page 469

• Manufacturer Part Number: HD6417705F133BV
• Description: MPU 3V 0K PB-FREE 208 FP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417705F133BV

• Core Processor: SH-3
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: EBI/EMI, FIFO, IrDA, SCI, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 105
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

b. Serial Data Transmission:
Figure 16.14 shows sample flowcharts for serial transmission.
Write remaining transmit data to SCFTDR
When using transmit FIFO data interrupt,
Write transmit data exceeding transmit
Set transmit trigger number in TTRG1
TDFE flag to 0 after reading 1 from it
trigger setting number, and clear
When using transmit FIFO data
Figure 16.14 Sample Serial Transmission Flowchart (1)
Figure 16.14 Sample Serial Transmission Flowchart (2)
Clear TE bit in SCSCR to 0
Clear TE bit in SCSCR to 0
interrupt, set TIE bit to 1
and TTRG0 in SCFCR
1-bit interval elapsed?
Set TE bit in SCSCR
Start of transmission
Set TE bit in SCSCR
Start of transmission
End of transmission
End of transmission
set TIE bit to 1
TEND =1?
TEND =1?
(First Transmission after Initialization)
(Second and Subsequent Transmission)
Yes
Yes
Yes
No
Wait
No
No
[3]
[1]
[2]
[4]
[5]
[1]
[2]
[3]
[1] Set the transmit trigger number
[2] Write transmit data to SCFTDR,
[3] Wait for one bit interval.
[4] Transmission is started when the
[5] After the end of transmission, clear
[1] Write the remaining transmit
[2] Transmission is started when
[3] After the end of transmission,
in SCFCR.
and clear the TDFE flag to 0 after
reading 1 from it.
TE bit in SCSCR is set to 1.
the TE bit to 0.
data to SCFTDR.
the TE bit in SCSCR is set to 1.
clear the TE bit to 0.
Rev. 2.00, 09/03, page 421 of 690