HD6417705F133BV Renesas Electronics America, HD6417705F133BV Datasheet - Page 498

• Manufacturer Part Number: HD6417705F133BV
• Description: MPU 3V 0K PB-FREE 208 FP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417705F133BV

• Core Processor: SH-3
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: EBI/EMI, FIFO, IrDA, SCI, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 105
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Bit
4
3, 2
1
0
18.3.18 DMA Transfer Setting Register (DMAR)
DMA transfer can be carried out between the endpoint 1 and 2 data registers and memory by
means of the on-chip direct memory access controller (DMA). Dual address transfer is performed
in bytes. To start DMA transfer, DMAC settings must be made in addition to the settings in this
register.
Bit
7 to 2
Rev. 2.00, 09/03, page 450 of 690
Bit Name
EP2CLR
EP0oCLR
EP0iCLR
Bit Name
Initial Value R/W Description
0
Initial Value
Undefined
Undefined
Undefined
Undefined
R
R/W
W
W
W
Reserved
These bits are always read as 0. The write value should
always be 0.
Description
EP2 Clear
Writing 1 to this bit initializes both sides of the
endpoint 2 transmit FIFO buffer.
Reserved
The write value should always be 0.
EP0o Clear
Writing 1 to this bit initializes the endpoint 0 receive
FIFO buffer.
EP0i Clear
Writing 1 to this bit initializes the endpoint 0 transmit
FIFO buffer.