HD6417705F133BV Renesas Electronics America, HD6417705F133BV Datasheet - Page 456

• Manufacturer Part Number: HD6417705F133BV
• Description: MPU 3V 0K PB-FREE 208 FP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417705F133BV

• Core Processor: SH-3
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: EBI/EMI, FIFO, IrDA, SCI, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 105
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

In serial transmission, the SCIF operates as described below.
1. When data is written into SCFTDR, the SCIF transfers the data from SCFTDR to SCTSR and
2. When data is transferred from SCFTDR to SCTSR and transmission is started, consecutive
3. The SCIF checks the SCFTDR transmit data at the timing for sending the stop bit. If data is
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starts transmitting. Confirm that the TDFE flag in the serial status register (SCSSR) is set to 1
before writing transmit data to SCFTDR. The number of data bytes that can be written is at
least 64 – (transmit trigger set number).
transmit operations are performed until there is no transmit data left in SCFTDR. When the
number of transmit data bytes in SCFTDR falls to or below the transmit trigger number set in
the FIFO control register (SCFCR), the TDFE flag is set. If the TIE bit in SCSCR is set to 1 at
this time, a transmit-FIFO-data-empty interrupt (TXI) request is generated.
When the transmit data stop function is used and the number of data bytes set in the transmit
data stop register (SCTDSR) is matched, transmit operation is stopped, and the TSF flag in the
serial status register (SCSSR) is set. If the TSIE bit in the serial control register (SCSCR) is set
to 1, a transmit-data-stop-interrupt (TDI) request is generated. The vectors of transmit-FIFO-
data-empty and transmit-data-stop interrupts are the same.
The serial transmit data is sent from the TxD pin in the following order.
a. Start bit: One 0-bit is output.
b. Transmit data: 8-bit or 7-bit data is output in LSB-first order.
c. Parity bit: One parity bit (even or odd parity) is output.
d. A format in which a parity bit is not output can also be selected.
e. Stop bit(s): One or two 1-bits (stop bits) are output.
f. Mark state: 1 is output continuously until the start bit that starts the next transmission is
present, the data is transferred from SCFTDR to SCTSR, the stop bit is sent, and then serial
transmission of the next frame is started.
If there is no transmit data, the TEND flag in SCSSR is set to 1, the stop bit is sent, and then
the line goes to the mark state in which 1 is output.
sent.