HD6417705F133BV Renesas Electronics America, HD6417705F133BV Datasheet - Page 669

• Manufacturer Part Number: HD6417705F133BV
• Description: MPU 3V 0K PB-FREE 208 FP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417705F133BV

• Core Processor: SH-3
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: EBI/EMI, FIFO, IrDA, SCI, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 105
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Notes: 1.
Register
Abbreviation
PHDR
PJDR
PKDR
PLDR
SCPDR
PMDR
PNDR
ADDRA
ADDRB
ADDRC
ADDRD
ADCSR
BDRB
BDMRB
BRCR
BETR
BARB
BAMRB
BBRB
BRSR
BARA
BAMRA
BBRA
BRDR
BASRA
BASRB
SDIR
SDID/SDIDH *
SDIDL *
4
2.
3.
4.
5.
The ENB bit is initialized. Other bits are retained.
The CF bit is undefined.
Although the flag is initialized, other bits are not initialized (except the reserved
bits).
Values of these resisters are fixed.
These registers are not initialized by a power-on reset caused by the WDT.
4
Power-On
Reset
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized *
Initialized
Initialized
Initialized
Initialized *
Undefined
Undefined
Retained
3
3
Manual
Reset
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Initialized
Initialized
Initialized
Initialized
Initialized
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Software
Standby
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Initialized
Initialized
Initialized
Initialized
Initialized
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Module
Standby
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Initialized
Initialized
Initialized
Initialized
Initialized
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Rev. 2.00, 09/03, page 621 of 690
Sleep
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Module
Port
ADC
UBC
UDI