MC9S12E128CPVE Freescale Semiconductor, MC9S12E128CPVE Datasheet - Page 301

IC MCU 128K FLASH 25MHZ 112-LQFP

MC9S12E128CPVE

Manufacturer Part Number
MC9S12E128CPVE
Description
IC MCU 128K FLASH 25MHZ 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheets

Specifications of MC9S12E128CPVE

Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
EBI/EMI, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
91
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 2.75 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Processor Series
S12E
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
92
Number Of Timers
12
Operating Supply Voltage
3.135 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 10-bit
On-chip Dac
2-ch x 8-bit
Controller Family/series
HCS12/S12X
No. Of I/o's
90
Ram Memory Size
8KB
Cpu Speed
25MHz
No. Of Timers
4
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
For Use With
M68EVB912E128 - BOARD EVAL FOR MC9S12E128/64
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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10.2
The IICV2 module has two external pins.
10.2.1
This is the bidirectional serial clock line (SCL) of the module, compatible to the IIC bus specification.
10.2.2
This is the bidirectional serial data line (SDA) of the module, compatible to the IIC bus specification.
10.3
This section provides a detailed description of all memory and registers for the IIC module.
10.3.1
The memory map for the IIC module is given below in
the address offset.The total address for each register is the sum of the base address for the IIC module and
the address offset for each register.
Freescale Semiconductor
External Signal Description
Memory Map and Register Definition
IIC_SCL — Serial Clock Line Pin
IIC_SDA — Serial Data Line Pin
Module Memory Map
MC9S12E128 Data Sheet, Rev. 1.07
Table
10-1. The address listed for each register is
Chapter 10 Inter-Integrated Circuit (IICV2)
301

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