DF2367VF33 Renesas Electronics America, DF2367VF33 Datasheet - Page 1012
DF2367VF33
Manufacturer Part Number
DF2367VF33
Description
MCU 3V 384K 128-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet
1.DF2368VTE34V.pdf
(1044 pages)
Specifications of DF2367VF33
Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
I²C, IrDA, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
84
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2367VF33
HD64F2367VF33
HD64F2367VF33
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2367VF33V
Manufacturer:
Renesas Electronics America
Quantity:
135
Company:
Part Number:
DF2367VF33V
Manufacturer:
Renesas Electronics America
Quantity:
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Company:
Part Number:
DF2367VF33WV
Manufacturer:
Renesas Electronics America
Quantity:
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Appendix
D.
Table D.1 shows the execution state of each instruction in this LSI.
Legend:
Figure D.1 shows the timing of the address bus, RD, HWR, and LWR during execution of the
sample instruction above (example in "Explanation of Table Contents") with an 8-bit bus, 3-state
access, and no wait.
Rev.6.00 Mar. 18, 2009 Page 952 of 980
REJ09B0050-0600
[Explanation of Table Contents]
R:B
R:W
W:B
W:W
:M
2nd
3rd
4th
5th
NEXT
EA
VEC
Instruction
Bus State during Execution of Instructions
R:W 2nd
1
Reading in bytes
Reading in words
Writing in bytes
Writing in words
Bus right cannot be handed over immediately after this cycle
Address of second word (3rd and 4th bytes)
Address of third word (5th and 6th bytes)
Address of fourth word (7th and 8th bytes)
Address of fifth word (9th and 10th bytes)
Start address of instruction immediately following the instruction being executed
Effective address
Vector address
1 state of inter-
nal operation
2
R:W EA
3
4
Order of execution
End of instruction
Read the effective address in words.
Read/write is not performed.
Read the second word of the instruction that is being executed in words.
5
6
7
8
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