DF2367VF33 Renesas Electronics America, DF2367VF33 Datasheet - Page 286

• Manufacturer Part Number: DF2367VF33
• Description: MCU 3V 384K 128-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2367VF33

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: I²C, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2367VF33; HD64F2367VF33

Section 7 DMA Controller (DMAC)
Legend:
×: Don't care
7.3.5
DMABCR controls the operation of each DMAC channel. The bit functions in the DMACR
registers differ according to the transfer mode.
Short Address Mode:
• DMABCRH
Rev.6.00 Mar. 18, 2009 Page 226 of 980
REJ09B0050-0600
Bit
3
2
1
0
Bit
15
14
13
Bit Name
DTF3
DTF2
DTF1
DTF0
Bit Name
FAE1
FAE0
SAE1
DMA Band Control Registers H and L (DMABCRH and DMABCRL)
Initial Value
0
0
0
0
Initial Value
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Full Address Enable 1
Full Address Enable 0
Single Address Enable 1
Description
Specifies whether channel 1 is to be used in
short address mode or full address mode. In
short address mode, channels 1A and 1B can be
used as independent channels.
0: Short address mode
1: Full address mode
Specifies whether channel 0 is to be used in
short address mode or full address mode. In
short address mode, channels 0A and 0B can be
used as independent channels.
0: Short address mode
1: Full address mode
Specifies whether channel 1B is to be used for
transfer in dual address mode or single address
mode. This bit is invalid in full address mode.
0: Dual address mode
1: Single address mode
Description
The same factor can be selected for more than
one channel. In this case, activation starts with
the highest-priority channel according to the
relative channel priorities. For relative channel
priorities, see section 7.5.12, Multi-Channel
Operation.