DF2367VF33 Renesas Electronics America, DF2367VF33 Datasheet - Page 288

MCU 3V 384K 128-QFP

DF2367VF33

Manufacturer Part Number
DF2367VF33
Description
MCU 3V 384K 128-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet

Specifications of DF2367VF33

Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
I²C, IrDA, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
84
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2367VF33
HD64F2367VF33

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Section 7 DMA Controller (DMAC)
• DMABCRL
Rev.6.00 Mar. 18, 2009 Page 228 of 980
REJ09B0050-0600
Bit
7
6
5
4
Bit Name
DTE1B
DTE1A
DTE0B
DTE0A
Initial Value
0
0
0
0
R/W
R/W
R/W
R/W
R/W
Description
Data Transfer Enable 1B
Data Transfer Enable 1A
Data Transfer Enable 0B
Data Transfer Enable 0A
If the DTIE bit is set to 1 when DTE = 0, the
DMAC regards this as indicating the end of a
transfer, and issues a transfer end interrupt
request to the CPU or DTC.
When DTE = 0, data transfer is enabled and the
DMAC ignores the activation source selected by
the DTF3 to DTF0 bits in DMACR.
When DTE = 1, data transfer is enabled and the
DMAC waits for a request by the activation
source selected by the DTF3 to DTF0 bits in
DMACR. When a request is issued by the
activation source, DMA transfer is executed.
[Clearing conditions]
[Setting condition]
When 1 is written to the DTE bit after reading
DTE = 0
When initialization is performed
When the specified number of transfers have
been completed in a transfer mode other
than repeat mode
When 0 is written to the DTE bit to forcibly
suspend the transfer, or for a similar reason

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