DF2367VF33 Renesas Electronics America, DF2367VF33 Datasheet - Page 244

MCU 3V 384K 128-QFP

DF2367VF33

Manufacturer Part Number
DF2367VF33
Description
MCU 3V 384K 128-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet

Specifications of DF2367VF33

Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
I²C, IrDA, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
84
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2367VF33
HD64F2367VF33

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Part Number
Manufacturer
Quantity
Price
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Manufacturer:
Renesas Electronics America
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Manufacturer:
Renesas Electronics America
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Section 6 Bus Controller (BSC)
Depending on the DRAM used, modification of the WE signal may not be permitted during the
refresh period. In this case, the CBRM bit in REFCR should be set to 1. The bus controller will
then insert refresh cycles in appropriate breaks between bus cycles. Figure 6.37 shows an example
of the timing when the CBRM bit is set to 1. In this case the CS signal is not controlled, and
retains its value prior to the start of the refresh period.
Rev.6.00 Mar. 18, 2009 Page 184 of 980
REJ09B0050-0600
Note: n = 2, 3
CSn (RASn)
UCAS, LCAS
φ
(RCW1 = 0, RCW0 = 1, RLW1 = 0, RLW0 = 0)
T
Rp
Figure 6.36 CBR Refresh Timing
T
Rrw
T
Rr
T
Rc1
T
Rc2

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