DF2367VF33 Renesas Electronics America, DF2367VF33 Datasheet - Page 318
DF2367VF33
Manufacturer Part Number
DF2367VF33
Description
MCU 3V 384K 128-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet
1.DF2368VTE34V.pdf
(1044 pages)
Specifications of DF2367VF33
Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
I²C, IrDA, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
84
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2367VF33
HD64F2367VF33
HD64F2367VF33
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Section 7 DMA Controller (DMAC)
Rev.6.00 Mar. 18, 2009 Page 258 of 980
REJ09B0050-0600
Figure 7.10 Example of Single Address Mode Setting Procedure (When Sequential Mode is
Set number of transfers
Set transfer source and
Single address mode
transfer destination
Read DMABCRL
Set DMABCRH
Single address
Set DMABCRL
mode setting
Set DMACR
addresses
[1]
[2]
[3]
[4]
[5]
[6]
[1] Set each bit in DMABCRH.
[2] Set the transfer source address/transfer
[3] Set the number of transfers in ETCR.
[4] Set each bit in DMACR.
[5] Read the DTE bit in DMABCRL as 0.
[6] Set each bit in DMABCRL.
Specified)
• Clear the FAE bit to 0 to select short address
• Set the SAE bit to 1 to select single address
• Specify enabling or disabling of internal
destination address in MAR.
• Set the transfer data size with the DTSZ bit.
• Specify whether MAR is to be incremented or
• Clear the RPE bit to 0 to select sequential
• Specify the transfer direction with the DTDIR
• Select the activation source with bits DTF3 to
• Specify enabling or disabling of transfer end
• Set the DTE bit to 1 to enable transfer.
mode.
mode.
interrupt clearing with the DTA bit.
decremented with the DTID bit.
mode.
bit.
DTF0.
interrupts with the DTIE bit.
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