C8051F302 Silicon Laboratories Inc, C8051F302 Datasheet - Page 113

• Manufacturer Part Number: C8051F302
• Description: IC 8051 MCU 8K FLASH 11MLP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F30xr

Specifications of C8051F302

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), UART/USART
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 8
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 11-VQFN
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: I2C, SMBus, UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 8
• Number Of Timers: 16 bit
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

Bit
ARBLOST
TXMODE
MASTER
ACKRQ
ACK
STA
STO
SI
Set by Hardware When:
• A START is generated.
• START is generated.
• The SMBus interface enters transmitter mode
• A START followed by an address byte is received. • Must be cleared by software.
• A STOP is detected while addressed as a slave.
• Arbitration is lost due to a detected STOP.
• A byte has been received and an ACK response
• A repeated START is detected as a MASTER when
• SCL is sensed low while attempting to generate a
• SDA is sensed low while transmitting a ‘1’
• The incoming ACK value is low (ACKNOWL-
• A START has been generated.
• Lost arbitration.
• A byte has been transmitted and an ACK/NACK
• A byte has been received.
• A START or repeated START followed by a slave
• A STOP has been received.
(after SMB0DAT is written before the start of an
SMBus frame).
value is needed.
STA is low (unwanted repeated START).
STOP or repeated START condition.
(excluding ACK bits).
EDGE).
received.
address + R/W has been received.
Table 13.3. Sources for Hardware Changes to SMB0CN
Rev. 2.3
Cleared by Hardware When:
• A STOP is generated.
• Arbitration is lost.
• A START is detected.
• Arbitration is lost.
• SMB0DAT is not written before the start
• A pending STOP is generated.
• After each ACK cycle.
• Each time SI is cleared.
• The incoming ACK value is high (NOT
• Must be cleared by software.
C8051F300/1/2/3/4/5
of an SMBus frame.
ACKNOWLEDGE).
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