C8051F302 Silicon Laboratories Inc, C8051F302 Datasheet - Page 81
![IC 8051 MCU 8K FLASH 11MLP](/photos/16/12/161294/c8051f300_sml.jpg)
C8051F302
Manufacturer Part Number
C8051F302
Description
IC 8051 MCU 8K FLASH 11MLP
Manufacturer
Silicon Laboratories Inc
Series
C8051F30xr
Specifications of C8051F302
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
8
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
11-VQFN
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
I2C, SMBus, UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
8
Number Of Timers
16 bit
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F302-GMR
Manufacturer:
SiliconL
Quantity:
3 000
Company:
Part Number:
C8051F302-GMR
Manufacturer:
SILICON
Quantity:
5 000
Part Number:
C8051F302-GMR
Manufacturer:
SILICONLABS/芯科
Quantity:
20 000
(Note: Do not use read-modify-write operations (ORL, ANL) on this register)
Bit7:
Bit6:
Bit5:
Bit4:
Bit3:
Bit2:
Bit1:
Bit0:
Bit7
R
-
UNUSED. Read = 0. Write = don’t care.
FERROR: FLASH Error Indicator.
0: Source of last reset was not a FLASH read/write/erase error.
1: Source of last reset was a FLASH read/write/erase error.
C0RSEF: Comparator0 Reset Enable and Flag.
Write
0: Comparator0 is not a reset source.
1: Comparator0 is a reset source (active-low).
Read
0: Source of last reset was not Comparator0.
1: Source of last reset was Comparator0.
SWRSF: Software Reset Force and Flag.
Write
0: No Effect.
1: Forces a system reset.
Read
0: Source of last reset was not a write to the SWRSF bit.
1: Source of last was a write to the SWRSF bit.
WDTRSF: Watchdog Timer Reset Flag.
0: Source of last reset was not a WDT timeout.
1: Source of last reset was a WDT timeout.
MCDRSF: Missing Clock Detector Flag.
Write:
0: Missing Clock Detector disabled.
1: Missing Clock Detector enabled; triggers a reset if a missing clock condition is detected.
Read:
0: Source of last reset was not a Missing Clock Detector timeout.
1: Source of last reset was a Missing Clock Detector timeout.
PORSF: Power-On Reset Force and Flag.
This bit is set anytime a power-on reset occurs. This may be due to a true power-on reset or a VDD
monitor reset. In either case, data memory should be considered indeterminate following the reset.
Writing this bit enables/disables the VDD monitor.
Write:
0: VDD monitor disabled.
1: VDD monitor enabled.
Read:
0: Last reset was not a power-on or VDD monitor reset.
1: Last reset was a power-on or VDD monitor reset; all other reset flags indeterminate.
PINRSF: HW Pin Reset Flag.
0: Source of last reset was not /RST pin.
1: Source of last reset was /RST pin.
FERROR
Bit6
R
C0RSEF
Figure 9.3. RSTSRC: Reset Source Register
R/W
Bit5
SWRSF
R/W
Bit4
WDTRSF MCDRSF
Bit3
R
Rev. 2.3
R/W
Bit2
C8051F300/1/2/3/4/5
PORSF
R/W
Bit1
PINRSF
Bit0
R
SFR Address:
Reset Value
Variable
0xEF
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