C8051F302 Silicon Laboratories Inc, C8051F302 Datasheet - Page 85

• Manufacturer Part Number: C8051F302
• Description: IC 8051 MCU 8K FLASH 11MLP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F30xr

Specifications of C8051F302

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), UART/USART
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 8
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 11-VQFN
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: I2C, SMBus, UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 8
• Number Of Timers: 16 bit
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

10.2. Non-volatile Data Storage
The FLASH memory can be used for non-volatile data storage as well as program code. This allows data such as cal-
ibration coefficients to be calculated and stored at run time. Data is written using the MOVX instruction and read
using the MOVC instruction.
10.3. Security Options
The CIP-51 provides security options to protect the FLASH memory from inadvertent modification by software as
well as to prevent the viewing of proprietary program code and constants. The Program Store Write Enable (bit
PSWE in register PSCTL) and the Program Store Erase Enable (bit PSEE in register PSCTL) bits protect the FLASH
memory from accidental modification by software. PSWE must be explicitly set to ‘1’ before software can modify
the FLASH memory; both PSWE and PSEE must be set to ‘1’ before software can erase FLASH memory. Additional
security features prevent proprietary program code and data constants from being read or altered across the C2 inter-
face.
A security lock byte stored at the last byte of FLASH user space protects the FLASH program memory from being
read or altered across the C2 interface. See Table 10.2 for the security byte description; see Figure 10.1 for a program
memory map and the security byte locations for each device.
The lock bits can always be read and cleared to logic 0 regardless of the security settings.
Important note: The only means of removing a lock (write or read/write) once set is to erase the entire pro-
gram memory space via a C2 Device Erase command.
organized in 512-byte
C8051F300/1/2/3
FLASH memory
Lock Byte
Reserved
pages
Bits
7-4
3-0
Figure 10.1. FLASH Program Memory Map
0x1E00
0x1DFF
0x1DFE
0x0000
Write Lock: Clearing any of these bits to logic 0 prevents all FLASH
memory from being written or page-erased across the C2 interface
Read/Write Lock: Clearing any of these bits to logic 0 prevents all FLASH
memory from being read, written, or page-erased across the C2 interface.
Table 10.2. Security Byte Decoding
organized in 512-byte
FLASH memory
C8051F304
Lock Byte
Reserved
pages
Rev. 2.3
Description
0x1000
0x0FFF
0x0FFE
0x0000
C8051F300/1/2/3/4/5
organized in 512-byte
FLASH memory
C8051F305
Lock Byte
Reserved
pages
0x0800
0x07FF
0x07FE
0x0000
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