C8051F302 Silicon Laboratories Inc, C8051F302 Datasheet - Page 35

• Manufacturer Part Number: C8051F302
• Description: IC 8051 MCU 8K FLASH 11MLP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F30xr

Specifications of C8051F302

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), UART/USART
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 8
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 11-VQFN
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: I2C, SMBus, UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 8
• Number Of Timers: 16 bit
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

5.3.
ADC0 has a maximum conversion speed of 500 ksps. The ADC0 conversion clock is a divided version of the system
clock, determined by the AD0SC bits in the ADC0CF register (system clock divided by (AD0SC + 1) for
0 ≤ AD0SC ≤ 31).
5.3.1. Starting a Conversion
A conversion can be initiated in one of five ways, depending on the programmed states of the ADC0 Start of Conver-
sion Mode bits (AD0CM2-0) in register ADC0CN. Conversions may be initiated by one of the following:
Writing a ‘1’ to AD0BUSY provides software control of ADC0 whereby conversions are performed "on-demand".
During conversion, the AD0BUSY bit is set to logic 1 and reset to logic 0 when the conversion is complete. The fall-
ing edge of AD0BUSY triggers an interrupt (when enabled) and sets the ADC0 interrupt flag (AD0INT). Note: When
polling for ADC conversion completions, the ADC0 interrupt flag (AD0INT) should be used. Converted data is avail-
able in the ADC0 data register, ADC0, when bit AD0INT is logic 1. Note that when Timer 2 overflows are used as
the conversion source, Timer 2 Low Byte overflows are used if Timer 2 is in 8-bit mode; Timer 2 High byte over-
flows are used if Timer 2 is in 16-bit mode. See
Important Note About Using CNVSTR: The CNVSTR input pin also functions as Port pin P0.6. When the
CNVSTR input is used as the ADC0 conversion source, Port pin P0.6 should be skipped by the Digital Crossbar. To
configure the Crossbar to skip P0.6, set to ‘1’ Bit6 in register XBR0. See
page 95
for details on Port I/O configuration.
Modes of Operation
1.
2.
3.
4.
5.
Writing a ‘1’ to the AD0BUSY bit of register ADC0CN
A Timer 0 overflow (i.e. timed continuous conversions)
A Timer 2 overflow
A Timer 1 overflow
A rising edge on the CNVSTR input signal (pin P0.6)
Section “15. Timers” on page 133
Rev. 2.3
C8051F300/1/2/3/4/5
Section “12. Port Input/Output” on
for timer configuration.
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