C8051F302 Silicon Laboratories Inc, C8051F302 Datasheet - Page 147

IC 8051 MCU 8K FLASH 11MLP

C8051F302

Manufacturer Part Number
C8051F302
Description
IC 8051 MCU 8K FLASH 11MLP
Manufacturer
Silicon Laboratories Inc
Series
C8051F30xr
Datasheets

Specifications of C8051F302

Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
8
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
11-VQFN
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
I2C, SMBus, UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
8
Number Of Timers
16 bit
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No

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16.2. Capture/Compare Modules
Each module can be configured to operate independently in one of six operation modes: Edge-triggered Capture,
Software Timer, High Speed Output, Frequency Output, 8-Bit Pulse Width Modulator, or 16-Bit Pulse Width Modu-
lator. Each module has Special Function Registers (SFRs) associated with it in the CIP-51 system controller. These
registers are used to exchange data with a module and configure the module's mode of operation.
Table 16.2 summarizes the bit settings in the PCA0CPMn registers used to select the PCA capture/compare module’s
operating modes. Setting the ECCFn bit in a PCA0CPMn register enables the module's CCFn interrupt. Note: PCA0
interrupts must be globally enabled before individual CCFn interrupts are recognized. PCA0 interrupts are globally
enabled by setting the EA bit and the EPCA0 bit to logic 1. See Figure 16.3 for details on the PCA interrupt configu-
ration.
PWM16 ECOM CAPP CAPN
Timer Overflow
PCA Counter/
X
X
X
X
X
X
0
1
Table 16.2. PCA0CPM Register Settings for PCA Capture/Compare Modules
W
M
P
1
6
n
PCA Module 0
PCA Module 1
PCA Module 2
(for n = 0 to 2)
PCA0CPMn
O
M
E
C
n
C
A
P
P
n
(CCF0)
(CCF1)
(CCF2)
X = Don’t Care
C
A
P
N
n
M
A
T
n
X
X
X
1
1
1
1
1
O
G
T
n
W
P
M
n
E
C
C
F
n
C
F
1
0
1
0
0
0
0
0
C
R
PCA0CN
Figure 16.3. PCA Interrupt Block Diagram
C
C
F
2
C
C
F
1
0
1
1
0
0
0
0
0
C
C
F
0
ECCF0
ECCF1
ECCF2
C
D
L
I
MAT
W
D
T
E
PCA0MD
W
D
C
L
K
X
X
X
0
0
0
1
1
C
P
S
2
C
P
S
1
0
1
0
1
0
1
C
P
S
0
TOG
C
E
F
0
0
0
0
1
1
0
0
0
1
Rev. 2.3
PWM ECCF
0
0
0
0
0
1
1
1
X
X
X
X
X
X
X
X
C8051F300/1/2/3/4/5
Capture triggered by negative edge on
Capture triggered by positive edge on
EPCA0
Capture triggered by transition on
16-Bit Pulse Width Modulator
8-Bit Pulse Width Modulator
High Speed Output
Frequency Output
Operation Mode
Software Timer
0
1
CEXn
CEXn
CEXn
EA
0
1
Interrupt
Priority
Decoder
147

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