C8051F302 Silicon Laboratories Inc, C8051F302 Datasheet - Page 32

• Manufacturer Part Number: C8051F302
• Description: IC 8051 MCU 8K FLASH 11MLP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F30xr

Specifications of C8051F302

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), UART/USART
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 8
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 11-VQFN
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: I2C, SMBus, UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 8
• Number Of Timers: 16 bit
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

C8051F300/1/2/3/4/5
5.1.
The analog multiplexers (AMUX0) select the positive and negative inputs to the PGA, allowing any Port pin to be
measured relative to any other Port pin or GND. Additionally, the on-chip temperature sensor or the positive power
supply (VDD) may be selected as the positive PGA input. When GND is selected as the negative input, ADC0
operates in Single-ended Mode; all other times, ADC0 operates in Differential Mode. The ADC0 input channels
are selected in the AMX0SL register as described in Figure 5.6.
The conversion code format differs in Single-ended versus Differential modes, as shown below. When in Single-
ended Mode (negative input is selected GND), conversion codes are represented as 8-bit unsigned integers. Inputs are
measured from ‘0’ to VREF * 255/256. Example codes are shown below.
When in Differential Mode (negative input is not selected as GND), conversion codes are represented as 8-bit signed
2’s complement numbers. Inputs are measured from -VREF to VREF * 127/128. Example codes are shown below.
Important Note About ADC0 Input Configuration: Port pins selected as ADC0 inputs should be configured as
analog inputs and should be skipped by the Digital Crossbar. To configure a Port pin for analog input, set to ‘0’ the
corresponding bit in register P0MDIN. To force the Crossbar to skip a Port pin, set to ‘1’ the corresponding bit in reg-
ister XBR0. See
The PGA amplifies the AMUX0 output signal as defined by the AMP0GN1-0 bits in the ADC0 Configuration regis-
ter (Figure 5.7). The PGA is software-programmable for gains of 0.5, 1, 2, or 4. The gain defaults to 0.5 on reset.
32
VREF * 255/256
VREF * 128/256
VREF * 127/128
-VREF * 64/128
VREF * 64/256
VREF * 64/128
Input Voltage
Input Voltage
- VREF
Analog Multiplexer and PGA
0
0
Section “12. Port Input/Output” on page 95
ADC0 Output (Conversion Code)
ADC0 Output (Conversion Code)
0xC0
0xFF
0x7F
0x80
0x40
0x00
0x40
0x00
0x80
Rev. 2.3
for more Port I/O configuration details.