HD6417709SF133B Renesas Electronics America, HD6417709SF133B Datasheet - Page 100

IC SUPERH MPU ROMLESS 208LQFP

HD6417709SF133B

Manufacturer Part Number
HD6417709SF133B
Description
IC SUPERH MPU ROMLESS 208LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417709SF133B

Core Processor
SH-3
Core Size
32-Bit
Speed
133MHz
Connectivity
EBI/EMI, FIFO, IrDA, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
96
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 2.05 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
208-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-

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2.5.2
There are two processor modes: privileged mode and user mode. The processor mode is
determined by the processor mode bit (MD) in the status register (SR). User mode is selected
when the MD bit is 0, and privileged mode when the MD bit is 1. When the reset state or
exception state is entered, the MD bit is set to 1. When exception handling ends, the MD bit is
cleared to 0 and user mode is entered. There are certain registers and bits which can only be
accessed in privileged mode.
Rev. 5.00, 09/03, page 54 of 760
Note: * The hardware standby mode is entered when the CA pin goes low from any state.
Interrupt
CA = 1,RESETP=0
From any state when
RESETP = 0
Processor Modes
Bus-released state
Bus
request
Sleep mode
Bus
request
clearance
Power-on reset
Figure 2.8 Processor State Transitions
state
RESETP = 1
bit cleared
Hardware standby mode*
with STBY
instruction
Exception
interrupt
SLEEP
Exception-handling state
Program execution state
RESETP = 0
From any state but hardware standby
mode when RESETM = 0
End of exception
transition
processing
RESETM = 1
SLEEP
Manual reset
instruction
with STBY
bit set
Standby mode
state
Reset state
Power-down state
Interrupt

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