HD6417709SF133B Renesas Electronics America, HD6417709SF133B Datasheet - Page 710

IC SUPERH MPU ROMLESS 208LQFP

HD6417709SF133B

Manufacturer Part Number
HD6417709SF133B
Description
IC SUPERH MPU ROMLESS 208LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417709SF133B

Core Processor
SH-3
Core Size
32-Bit
Speed
133MHz
Connectivity
EBI/EMI, FIFO, IrDA, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
96
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 2.05 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
208-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-

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23.3.1
Table 23.5 Clock Timing
VccQ = 3.3 ± 0.3 V, Vcc = 1.55 to 2.15 V, AVcc = 3.3 ± 0.3 V, Ta = –20 to 75°C
Item
EXTAL clock input frequency (clock mode 0)
EXTAL clock input cycle time (clock mode 0)
EXTAL clock input frequency (clock mode 1)
EXTAL clock input cycle time (clock mode 2)
EXTAL clock input low pulse width
EXTAL clock input high pulse width
EXTAL clock input rise time
EXTAL clock input fall time
CKIO clock input frequency
CKIO clock input cycle time
CKIO clock input low pulse width
CKIO clock input high pulse width
CKIO clock input rise time
CKIO clock input fall time
CKIO clock output frequency
CKIO clock output cycle time
CKIO clock output low pulse width
CKIO clock output high pulse width
CKIO clock output rise time
CKIO clock output fall time
CKIO2 clock output delay time
CKIO2 clock output rise time
CKIO2 clock output fall time
Power-on oscillation settling time
RESETP setup time
RESETM setup time
RESETP assert time
RESETM assert time
Standby return oscillation settling time 1
Standby return oscillation settling time 2
Standby return oscillation settling time 3
PLL synchronization settling time 1
(standby canceled)
PLL synchronization settling time 2
(multiplication rete modified)
IRQ/IRL interrupt determination time
(RTC used and standby mode)
Rev. 5.00, 09/03, page 664 of 760
Clock Timing
Symbol
f
t
f
t
t
t
t
t
f
t
t
t
t
t
f
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
EX
EXcyc
EX
EXcyc
EXL
EXH
EXR
EXF
CKI
CKIcyc
CKIL
CKIH
CKIR
CKIF
OP
cyc
CKOL
CKOH
CKOR
CKOF
CK2D
CK20R
CK20F
OSC1
RESPS
RESMS
RESPW
RESMW
OSC2
OSC3
OSC4
PLL1
PLL2
IRLSTB
Min
25
15
6.25
60
1.5
1.5
20
15.2
1.5
1.5
25
15.2
3
3
–3
10
20
6
20
20
10
10
11
100
100
100
Max
66.67
40
16.67
160
6
6
66
40
6
6
66
40
5
5
3
7
7
Unit
MHz
ns
MHz
ns
ns
ns
ns
ns
MHz
ns
ns
ns
ns
ns
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ms
ns
ns
t
t
ms
ms
ms
µs
µs
µs
cyc
cyc
Figure
23.1
23.2
23.3
23.4
23.4, 23.5
23.5
23.6
23.7
23.8, 23.9
23.10
23.9

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