HD6417709SF133B Renesas Electronics America, HD6417709SF133B Datasheet - Page 554

IC SUPERH MPU ROMLESS 208LQFP

HD6417709SF133B

Manufacturer Part Number
HD6417709SF133B
Description
IC SUPERH MPU ROMLESS 208LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417709SF133B

Core Processor
SH-3
Core Size
32-Bit
Speed
133MHz
Connectivity
EBI/EMI, FIFO, IrDA, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
96
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 2.05 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
208-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417709SF133B
Manufacturer:
RENESAS
Quantity:
79
Part Number:
HD6417709SF133B
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD6417709SF133B
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Part Number:
HD6417709SF133B-V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Part Number:
HD6417709SF133BV
Manufacturer:
RENESAS
Quantity:
1 000
Part Number:
HD6417709SF133BV
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
The receive margin is found from the following equation:
For smart card mode:
Where:
Using this equation, the receive margin when F
Rev. 5.00, 09/03, page 508 of 760
Base clock
data (RxD)
Synchro-
sampling
sampling
Receive
nization
timing
timing
M = (0.5
M
M
N
D
L
F
Data
(0.5 – 1/2
Absolute value of clock frequency deviation
Frame length (L
Figure 15.8 Receive Data Sampling Timing in Smart Card Mode
Ratio of bit rate to clock (N 372)
Clock duty (D
Receive margin (%)
0
186 clock cycles
2N
1
)
372 clock cycles
372)
Start
(L
bit
185
0 to 1.0)
0.5)F
100
10)
49.866
D
N
0.5
371 0
(1 + F)
0 and D
100%
0.5 is as follows:
D0
185
371 0
D1

Related parts for HD6417709SF133B