HD6417709SF133B Renesas Electronics America, HD6417709SF133B Datasheet - Page 302

• Manufacturer Part Number: HD6417709SF133B
• Description: IC SUPERH MPU ROMLESS 208LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417709SF133B

• Core Processor: SH-3
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: EBI/EMI, FIFO, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 96
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 2.05 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

10.2.10 Refresh Time Constant Register (RTCOR)
The refresh time constant register (RTCOR) specifies the upper-limit value of RTCNT. The values
of RTCOR and RTCNT (lower 8 bits) are constantly compared. When the values match, the
compare match flag (CMF) in RTCSR is set and RTCNT is cleared to 0. When the refresh bit
(RFSH) in the individual memory control register (MCR) is set to 1 and the refresh mode is set to
auto refresh, a memory refresh cycle occurs when the CMF bit is set. RTCOR is a
readable/writable register. RTCOR is initialized to H'00 by a power-on reset. It is not initialized by
a manual reset or in standby mode, but holds its contents. Make the RTCOR setting before setting
bits CKS2 to CKS0 in RTCSR.
Note: The method of writing to RTCOR differs from that for general registers to ensure that
10.2.11 Refresh Count Register (RFCR)
The refresh count register (RFCR) counts the number of refreshing. When RFCR exceeds the
count limit value set in the LMTS bit in RTCSR, the OVF bit in RTCSR is set and RFCR is
cleared. RFCR is a 10-bit readable/writable counter. RFCR is initialized to H'0000 by a power-on
reset. RFCR continues incrementing in a manual reset. It is not initialized by in standby mode, but
holds its contents.
Note: The method of writing to RFCR differs from that for general registers to ensure that RFCR
Rev. 5.00, 09/03, page 256 of 760
Initial value:
Initial value:
RTCOR is not rewritten incorrectly. Use a word transfer instruction to set the upper byte
as B'10100101 and the lower byte as the write data. For details, see section 10.2.12,
Cautions on Accessing Refresh Control Related Registers.
is not rewritten incorrectly. Use a word transfer instruction to set the six bits starting from
the MSB in the upper byte as B'101001, and the remaining bits as the write data. For
details, see section 10.2.12, Cautions on Accessing Refresh Control Related Registers.
R/W:
R/W:
Bit:
Bit:
R/W
15
—
0
7
0
R/W
14
—
0
6
0
R/W
13
—
0
5
0
R/W
12
—
0
4
0
R/W
11
—
0
3
0
R/W
10
—
0
2
0
R/W
—
9
0
1
0
R/W
—
8
0
0
0