HD6417709SF133B Renesas Electronics America, HD6417709SF133B Datasheet - Page 299

• Manufacturer Part Number: HD6417709SF133B
• Description: IC SUPERH MPU ROMLESS 208LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417709SF133B

• Core Processor: SH-3
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: EBI/EMI, FIFO, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 96
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 2.05 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

10.2.8
The refresh timer control/status register (RTCSR) is a 16-bit readable/writable register that
specifies the refresh cycle, whether to generate an interrupt, and the cycle of that interrupt. It is
initialized to H'0000 by a power-on reset, but is not initialized by a manual reset or in standby
mode. Make the RTCOR setting before setting bits CKS2 to CKS0 in RTCSR.
Note: The method of writing to RTCSR differs from that for general registers to ensure that
Bits 15 to 8—Reserved: These bits are always read as 0. The write value should always be 0.
Bit 7—Compare Match Flag (CMF): Indicates that the values of RTCNT and RTCOR match.
Note: * Contents do not change when 1 is written to CMF.
Bit 6—Compare Match Interrupt Enable (CMIE): Enables or disables an interrupt request
caused when CMF in RTCSR is set to 1. Do not set this bit to 1 when using auto-refresh.
Bit 7: CMF
0
1
Bit 6: CMIE
0
1
Initial value:
Initial value:
RTCSR is not rewritten incorrectly. Use a word transfer instruction to set the upper byte as
B'10100101 and the lower byte as the write data. For details, see section 10.2.12, Cautions
on Accessing Refresh Control Related Registers.
Refresh Timer Control/Status Register (RTCSR)
R/W:
R/W:
Bit:
Bit:
CMF
Description
The values of RTCNT and RTCOR do not match
Clearing condition: When a refresh is performed after 0 has been written to
CMF and RFSH
The values of RTCNT and RTCOR match
Setting condition: RTCNT
Description
Interrupt request by CMF is disabled
Interrupt request by CMF is enabled
R/W
15
—
R
0
7
0
CMIE
R/W
14
—
R
0
6
0
1 and RMODE
CKS2
R/W
13
—
R
0
5
0
RTCOR *
CKS1
R/W
12
—
R
0
4
0
0 (to perform a CBR refresh)
CKS0
R/W
11
—
R
0
3
0
Rev. 5.00, 09/03, page 253 of 760
OVF
R/W
10
—
R
0
2
0
OVIE
R/W
—
R
9
0
1
0
(Initial value)
(Initial value)
LMTS
R/W
—
R
8
0
0
0