HD6417709SF133B Renesas Electronics America, HD6417709SF133B Datasheet - Page 277

IC SUPERH MPU ROMLESS 208LQFP

HD6417709SF133B

Manufacturer Part Number
HD6417709SF133B
Description
IC SUPERH MPU ROMLESS 208LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417709SF133B

Core Processor
SH-3
Core Size
32-Bit
Speed
133MHz
Connectivity
EBI/EMI, FIFO, IrDA, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
96
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 2.05 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
208-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-

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Memory Bus Width: The memory bus width in the SH7709S can be set for each area. In area 0,
external pins can be used to select byte (8 bits), word (16 bits), or longword (32 bits) on power-on
reset. The correspondence between the external pins (MD4 and MD3) and the memory size is
shown in table below.
Table 10.4 Correspondence between External Pins (MD4 and MD3) and Memory Size
For areas 2–6, byte, word, and longword can be chosen for the bus width using bus control register
2 (BCR2) whenever ordinary memory, ROM, or burst ROM are used. When the synchronous
DRAM interface is used, word or longword can be chosen as the bus width.
When the PCMCIA interface is used, set the bus width to byte or word. When synchronous
DRAM is connected to both area 2 and area 3, set the same bus width for areas 2 and 3. When
using the port function, set each of the bus widths to byte or word for all areas. For more
information, see section 10.2.2, Bus Control Register 2 (BCR2).
MD4
0
0
1
1
Area 3: H'0C000000
Area 0: H'00000000
Area 1: H'04000000
Area 2: H'08000000
Area 4: H'10000000
Area 5: H'14000000
Area 6: H'18000000
MD3
0
1
0
1
Figure 10.3 Physical Space Allocation
burst ROM/PCMCIA
burst ROM/PCMCIA
synchronous DRAM
synchronous DRAM
Ordinary memory/
Ordinary memory/
Ordinary memory/
Ordinary memory/
Ordinary memory/
Ordinary memory
Memory Size
Reserved (Do not set)
8 bits
16 bits
32 bits
Internal I/O
burst ROM
The PCMCIA interface is shared
by the memory and I/O card
The PCMCIA interface is shared
by the memory and I/O card
Rev. 5.00, 09/03, page 231 of 760

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