HD6417709SF133B Renesas Electronics America, HD6417709SF133B Datasheet - Page 504

IC SUPERH MPU ROMLESS 208LQFP

HD6417709SF133B

Manufacturer Part Number
HD6417709SF133B
Description
IC SUPERH MPU ROMLESS 208LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417709SF133B

Core Processor
SH-3
Core Size
32-Bit
Speed
133MHz
Connectivity
EBI/EMI, FIFO, IrDA, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
96
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 2.05 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
208-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-

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Transmitting Serial Data (Asynchronous Mode): Figure 14.8 shows a sample flowchart for
transmitting serial data. The procedure for transmitting serial data is:
1. SCI status check and transmit data write: Read the serial status register (SCSSR), check that
2. To continue transmitting serial data: Read the TDRE bit to check whether it is safe to write (if
3. To output a break at the end of serial transmission: Set the port SC data register (SCPDR) and
Rev. 5.00, 09/03, page 458 of 760
Note: Numbers in parentheses refer to steps in the preceding procedure description.
the TDRE bit is 1, then write transmit data in the transmit data register (SCTDR) and clear
TDRE to 0.
it reads 1); if so, write data in SCTDR, then clear TDRE to 0.
port SC control register (SCPCR), then clear the TE bit to 0 in the serial control register
(SCSCR). For SCPCR and SCPDR settings, see section 14.2.8, SC Port Control Register
(SCPCR)/SC Port Data Register (SCPDR).
Figure 14.7 Sample Flowchart for SCI Initialization
and set RIE, TIE, TEIE, and MPIE bits
Clear TE and RE bits in SCSCR to 0
Set CKE1 and CKE0 bits in SCSCR
Set TE and RE bits in SCSCR to 1
(TE and RE bits are 0)
Select communication
Set value in SCBRR
format in SCSMR
interval elapsed?
Initialization
Has a 1-bit
End
Yes
Wait
No
(1)
(2)
(3)
(4)

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