HD6417709SF133B Renesas Electronics America, HD6417709SF133B Datasheet - Page 485

• Manufacturer Part Number: HD6417709SF133B
• Description: IC SUPERH MPU ROMLESS 208LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417709SF133B

• Core Processor: SH-3
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: EBI/EMI, FIFO, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 96
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 2.05 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

Bit 2—Transmit-End Interrupt Enable (TEIE): Enables or disables the transmit-end interrupt
(TEI) requested if SCTDR does not contain new transmit data when the MSB is transmitted.
Note: * The TEI request can be cleared by reading the TDRE bit in the serial status register
Bits 1 and 0—Clock Enable 1 and 0 (CKE1, CKE0): Select the SCI clock source and enable or
disable clock output from the SCK pin. Depending on the combination of CKE1 and CKE0, the
SCK pin can be used for serial clock output or serial clock input.
The CKE0 setting is valid only in asynchronous mode, and only when the SCI is internally
clocked (CKE1
clock source is selected (CKE1
register (SCSMR), set CKE1 and CKE0. For further details on selection of the SCI clock source,
see table 14.10 in section 14.3, Operation.
Notes: 1. The output clock frequency is the same as the bit rate.
Bit 2: TEIE
0
Bit 1:
CKE1
0
1
1
2. The input clock frequency is 16 times the bit rate.
(SCSSR) after it has been set to 1, then clearing TDRE to 0 and clearing the transmit end
(TEND) bit to 0, or by clearing the TEIE bit to 0.
Bit 0:
CKE0
0
1
0
1
Description
Transmit-end interrupt (TEI) requests are disabled *
Transmit-end interrupt (TEI) requests are enabled *
0). The CKE0 setting is ignored in synchronous mode, or when an external
Description
Asynchronous mode
Synchronous mode
Asynchronous mode
Synchronous mode
Asynchronous mode
Synchronous mode
Asynchronous mode
Synchronous mode
1). Before selecting the SCI operating mode in the serial mode
Internal clock, SCK pin used for input pin (input signal
is ignored)
Internal clock, SCK pin used for synchronous clock
output
Internal clock, SCK pin used for clock output *
Internal clock, SCK pin used for synchronous clock
output
External clock, SCK pin used for clock input *
External clock, SCK pin used for synchronous clock
input
External clock, SCK pin used for clock input *
External clock, SCK pin used for synchronous clock
input
Rev. 5.00, 09/03, page 439 of 760
(Initial value)
(Initial value)
(Initial value)
2
2
1