R5F211B1SP#U0 Renesas Electronics America, R5F211B1SP#U0 Datasheet - Page 113

• Manufacturer Part Number: R5F211B1SP#U0
• Description: IC R8C MCU FLASH 4K 20SSOP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/R8C/Tiny/1Br

Specifications of R5F211B1SP#U0

• Core Processor: R8C
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SIO, SSU, UART/USART
• Peripherals: LED, POR, Voltage Detect, WDT
• Number Of I /o: 13
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 20-SSOP
• For Use With: R0K5211B4S001BE - KIT STARTER FOR R8C/18191A1BR0K5211B4S000BE - KIT DEV EVALUATION R8C/1BR0E521174CPE10 - EMULATOR COMPACT R8C/18/19/1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/1A Group, R8C/1B Group
Rev.1.30
REJ09B0252-0130
Figure 12.16
Timer C Control Register 1
b7 b6 b5 b4
NOTES :
1.
2.
3. When the TCC13 bit is set to 0 (input capture mode), set bits TCC12 and TCC14 to TCC17 to 0.
When the same value from the INT3
When the TCC00 bit in the TCC0 register is set to 0 (count stops), rew rite the TCC13 bit.
Dec 08, 2006
b3 b2
TCC1 Register
b1
b0
Bit Symbol
Symbol
TCC10
TCC11
TCC12
TCC13
TCC14
TCC15
TCC16
TCC17
TCC1
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_____
INT3
Timer C counter reload select
bit
Compare 0 / capture select bit 0 : Capture select (input capture mode)
Compare 0 output mode select
bits
Compare 1 output mode select
bits
(2,3)
_____
(3)
(3)
filter select bits
pin is sampled three times continuously, the input is determined.
Address
Bit Name
009Bh
(1)
b1b0
0 0 : No filter
0 1 : Filter w ith f1 sampling
1 0 : Filter w ith f8 sampling
1 1 : Filter w ith f32 sampling
b5 b4
0 0 : CMP output remains unchanged even
0 1 : CMP output is reversed w hen compare
1 0 : CMP output is set to “L” w hen compare
1 1 : CMP output is set to “H” w hen compare
b7 b6
0 0 : CMP output remains unchanged even
0 1 : CMP output is reversed w hen compare
1 0 : CMP output is set to “L” w hen compare
1 1 : CMP output is set to “H” w hen compare
0 : No reload
1 : Set TC register to 0000h w hen compare 1
1 : Compare 0 output select
is matched.
(output compare mode)
w hen compare 0 is matched.
0 signal is matched.
0 signal is matched.
0 signal is matched.
w hen compare 1 is matched.
1 signal is matched.
1 signal is matched.
1 signal is matched.
After Reset
Function
00h
(2)
12. Interrupts
RW
RW
RW
RW
RW
RW
RW
RW
RW