R5F211B1SP#U0 Renesas Electronics America, R5F211B1SP#U0 Datasheet - Page 201

• Manufacturer Part Number: R5F211B1SP#U0
• Description: IC R8C MCU FLASH 4K 20SSOP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/R8C/Tiny/1Br

Specifications of R5F211B1SP#U0

• Core Processor: R8C
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SIO, SSU, UART/USART
• Peripherals: LED, POR, Voltage Detect, WDT
• Number Of I /o: 13
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 20-SSOP
• For Use With: R0K5211B4S001BE - KIT STARTER FOR R8C/18191A1BR0K5211B4S000BE - KIT DEV EVALUATION R8C/1BR0E521174CPE10 - EMULATOR COMPACT R8C/18/19/1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/1A Group, R8C/1B Group
Rev.1.30
REJ09B0252-0130
16.2.4
Table 16.4
NOTES:
SSUMS and BIDE: Bits in SSMR2 register
MSS: Bit in SSCRH register
TE and RE: Bits in SSER register
Clock synchronous
communication mode
4-wire bus
communication mode
4-wire bus
(bidirectional)
communication mode
Communication Mode
1. This pin can be used as a programmable I/O port.
2. Do not set both bits TE and RE to 1 in 4-wire bus (bidirectional) communication mode.
Clock synchronous serial I/O with chip select switches the functions of the I/O pins in each communication
mode according to the setting of the MSS bit in the SSCRH register and bits RE and TE in the SSER register.
Table 16.4 shows the Association between Communication Modes and I/O Pins.
Dec 08, 2006
Communication Modes and Pin Functions
Association between Communication Modes and I/O Pins
(2)
Page 183 of 315
0
1
1
SSUMS
Disabled 0
0
1
BIDE
Bit Setting
1
0
1
0
1
MSS
0
1
0
1
0
1
0
1
0
1
0
1
TE
1
0
1
1
0
1
1
0
1
1
0
1
1
0
1
0
16. Clock Synchronous Serial Interface
RE
Input
−
Input
Input
−
Input
−
Output
Output
Input
−
Input
−
−
−
−
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
SSI
Pin State
Output
Output
Output
−
Output
−
Output
Input
−
Input
−
Output
Input
Output
Input
Output
(1)
(1)
(1)
(1)
SSO
Input
Input
Input
Output
Output
Output
Input
Input
Input
Output
Output
Output
Input
Input
Output
Output
SSCK