R5F211B1SP#U0 Renesas Electronics America, R5F211B1SP#U0 Datasheet - Page 285

• Manufacturer Part Number: R5F211B1SP#U0
• Description: IC R8C MCU FLASH 4K 20SSOP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/R8C/Tiny/1Br

Specifications of R5F211B1SP#U0

• Core Processor: R8C
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SIO, SSU, UART/USART
• Peripherals: LED, POR, Voltage Detect, WDT
• Number Of I /o: 13
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 20-SSOP
• For Use With: R0K5211B4S001BE - KIT STARTER FOR R8C/18191A1BR0K5211B4S000BE - KIT DEV EVALUATION R8C/1BR0E521174CPE10 - EMULATOR COMPACT R8C/18/19/1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/1A Group, R8C/1B Group
Rev.1.30
REJ09B0252-0130
18.4.5
Table 18.6
NOTE:
1
1
0
FMR07(SR5) FMR06(SR4)
1. The MCU enters read array mode when FFh is written in the second bus cycle of these commands.
(Status Register) Status
When an error occurs, bits FMR06 to FMR07 in the FMR0 register are set to 1, indicating the occurrence of an
error. Therefore, checking these status bits (full status check) can be used to determine the execution result.
Table 18.6 lists the Errors and FMR0 Register Status. Figure 18.16 shows the Full Status Check and Handling
Procedure for Individual Errors.
At the same time, the command code written in the first bus cycle is disabled.
FRM0 Register
Dec 08, 2006
Full Status Check
Errors and FMR0 Register Status
1
0
1
Page 267 of 315
Command
sequence
error
Erase error
Program error
Error
• When the program command is executed but not
• When a command is not written correctly.
• When invalid data other than that which can be written
• When the program command or block erase command
• When an address not allocated in flash memory is input
• When attempting to erase the block for which rewriting
• When an address not allocated in flash memory is input
• When attempting to write the block for which rewriting
• When the block erase command is executed but
in the second bus cycle of the block erase command is
written (i.e., other than D0h or FFh).
is executed while rewriting is disabled by the FMR02 bit
in the FMR0 register, or the FMR15 or FMR16 bit in the
FMR1 register.
during erase command input.
is disabled during erase command input.
during write command input.
is disabled during write command input.
auto-erasure does not complete correctly.
auto-programming does not complete correctly.
Error Occurrence Condition
(1)
18. Flash Memory