R5F211B1SP#U0 Renesas Electronics America, R5F211B1SP#U0 Datasheet - Page 190

IC R8C MCU FLASH 4K 20SSOP

R5F211B1SP#U0

Manufacturer Part Number
R5F211B1SP#U0
Description
IC R8C MCU FLASH 4K 20SSOP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/R8C/Tiny/1Br
Datasheets

Specifications of R5F211B1SP#U0

Core Processor
R8C
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, SIO, SSU, UART/USART
Peripherals
LED, POR, Voltage Detect, WDT
Number Of I /o
13
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
20-SSOP
For Use With
R0K5211B4S001BE - KIT STARTER FOR R8C/18191A1BR0K5211B4S000BE - KIT DEV EVALUATION R8C/1BR0E521174CPE10 - EMULATOR COMPACT R8C/18/19/1
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F211B1SP#U0R5F211B1SP#V0
Manufacturer:
MICREL
Quantity:
2 860
R8C/1A Group, R8C/1B Group
Rev.1.30
REJ09B0252-0130
Figure 16.2
SS Control Register H
b7 b6 b5 b4 b3 b2 b1 b0
NOTES :
1.
2.
3.
4. Refer to 16.2.8.1 Accessing Registers Associated w ith Clock Synchronous Serial I/O w ith Chip Select for
The set clock is used w hen the internal clock is selected.
The SSCK pin functions as the transfer clock output pin w hen the MSS bit is set to 1 (operates as master device).
The MSS bit is set to 0 (operates as slave device) w hen the CE bit in the SSSR register is set to 1 (conflict error
occurs).
The RSSTP bit is disabled w hen the MSS bit is set to 0 (operates as slave device).
more information.
Dec 08, 2006
SSCRH Register
Bit Symbol
(b4-b3)
(4)
Symbol
SSCRH
RSSTP
CKS0
CKS1
CKS2
MSS
(b7)
Page 172 of 315
Transfer clock rate select bits
Nothing is assigned. If necessary, set to 0.
When read, the content is 0.
Master/slave device select bit
Receive single stop bit
Nothing is assigned. If necessary, set to 0.
When read, the content is 0.
Address
Bit Name
00B8h
(3)
(2)
(1)
0 : Operates as slave device.
1 : Operates as master device.
0 : Maintains receive operation after
1 : Completes receive operation after
b2 b1 b0
0 0 0 : f1/256
0 0 1 : f1/128
0 1 0 : f1/64
0 1 1 : f1/32
1 0 0 : f1/16
1 0 1 : f1/8
1 1 0 : f1/4
1 1 1 : Do not set.
receiving 1 byte of data.
receiving 1 byte of data.
16. Clock Synchronous Serial Interface
After Reset
Function
00h
RW
RW
RW
RW
RW
RW

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