R5F211B1SP#U0 Renesas Electronics America, R5F211B1SP#U0 Datasheet - Page 92

IC R8C MCU FLASH 4K 20SSOP

R5F211B1SP#U0

Manufacturer Part Number
R5F211B1SP#U0
Description
IC R8C MCU FLASH 4K 20SSOP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/R8C/Tiny/1Br
Datasheets

Specifications of R5F211B1SP#U0

Core Processor
R8C
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, SIO, SSU, UART/USART
Peripherals
LED, POR, Voltage Detect, WDT
Number Of I /o
13
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
20-SSOP
For Use With
R0K5211B4S001BE - KIT STARTER FOR R8C/18191A1BR0K5211B4S000BE - KIT DEV EVALUATION R8C/1BR0E521174CPE10 - EMULATOR COMPACT R8C/18/19/1
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F211B1SP#U0R5F211B1SP#V0
Manufacturer:
MICREL
Quantity:
2 860
R8C/1A Group, R8C/1B Group
Rev.1.30
REJ09B0252-0130
10.5
Table 10.5
10.5.1
Oscillation stop detection clock and
frequency bandwidth
Enabled condition for oscillation stop
detection function
Operation at oscillation stop detection
The oscillation stop detection function detects the stop of the main clock oscillating circuit. The oscillation stop
detection function can be enabled and disabled by bits OCD1 to OCD0 in the OCD register.
Table 10.5 lists the Specifications of Oscillation Stop Detection Function.
When the main clock is the CPU clock source and bits OCD1 to OCD0 are set to 11b (oscillation stop detection
function enabled), the system is placed in the following state if the main clock stops.
• OCD2 bit in OCD register = 1 (on-chip oscillator clock selected)
• OCD3 bit in OCD register = 1 (main clock stops)
• CM14 bit in CM1 register = 0 (low-speed on-chip oscillator oscillates)
• Oscillation stop detection interrupt request is generated.
Oscillation Stop Detection Function
• The oscillation stop detection interrupt shares a vector with the voltage monitor 2 interrupt, and the
• When the main clock restarts after oscillation stop, switch the main clock to the clock source of the CPU
• Figure 10.11 shows the Procedure for Switching Clock Source from Low-Speed On-Chip Oscillator to
• To enter wait mode while using the oscillation stop detection function, set the CM02 bit to 0 (peripheral
• Since the oscillation stop detection function is a function for cases where the main clock is stopped by an
• This function cannot be used when the main clock frequency is 2 MHz or below. In this case, set bits OCD1
• To use the low-speed on-chip oscillator clock for the CPU clock and clock sources of peripheral functions
Dec 08, 2006
watchdog timer interrupt. When using the oscillation stop detection interrupt and watchdog timer interrupt,
the interrupt source needs to be determined. Table 10.6 lists Determining Interrupt Source for Oscillation
Stop Detection, Watchdog Timer, and Voltage Monitor 2 Interrupts.
clock and peripheral functions by a program.
Main Clock.
function clock does not stop in wait mode).
external cause, set bits OCD1 to OCD0 to 00b (oscillation stop detection function disabled) when the main
clock stops or is started by a program (stop mode is selected or the CM05 bit is changed).
to OCD0 to 00b (oscillation stop detection function disabled).
after detecting the oscillation stop, set the HRA01 bit in the HRA0 register to 0 (low-speed on-chip
oscillator selected) and bits OCD1 to OCD0 to 11b (oscillation stop detection function enabled).
To use the high-speed on-chip oscillator clock for the CPU clock and clock sources of peripheral functions
after detecting the oscillation stop, set the HRA01 bit to 1 (high-speed on-chip oscillator selected) and bits
OCD1 to OCD0 to 11b (oscillation stop detection function enabled).
How to Use Oscillation Stop Detection Function
Specifications of Oscillation Stop Detection Function
Item
Page 74 of 315
f(XIN) ≥ 2 MHz
Set bits OCD1 to OCD0 to 11b (oscillation stop detection
function enabled).
Oscillation stop detection interrupt is generated
Specification
10. Clock Generation Circuit

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