R5F211B1SP#U0 Renesas Electronics America, R5F211B1SP#U0 Datasheet - Page 123

IC R8C MCU FLASH 4K 20SSOP

R5F211B1SP#U0

Manufacturer Part Number
R5F211B1SP#U0
Description
IC R8C MCU FLASH 4K 20SSOP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/R8C/Tiny/1Br
Datasheets

Specifications of R5F211B1SP#U0

Core Processor
R8C
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, SIO, SSU, UART/USART
Peripherals
LED, POR, Voltage Detect, WDT
Number Of I /o
13
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
20-SSOP
For Use With
R0K5211B4S001BE - KIT STARTER FOR R8C/18191A1BR0K5211B4S000BE - KIT DEV EVALUATION R8C/1BR0E521174CPE10 - EMULATOR COMPACT R8C/18/19/1
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F211B1SP#U0R5F211B1SP#V0
Manufacturer:
MICREL
Quantity:
2 860
R8C/1A Group, R8C/1B Group
Rev.1.30
REJ09B0252-0130
Figure 13.3
Watchdog Timer Reset Register
Watchdog Timer Start Register
Count Source Protection Mode Register
b7
NOTES :
b7
b7 b6 b5 b4
NOTES :
1.
2.
1.
2.
0 0 0 0
Do not generate an interrupt betw een w hen 00h and FFh are w ritten.
When the CSPRO bit in the CSPR register is set to 1 (count source protection mode enabled),
0FFFh is set in the w atchdog timer.
When 0 is w itten to the CSPROINI bit in the OFS register, the value after reset is 10000000b.
Write 0 before w riting 1 to set the CSPRO bit to 1.
0 cannot be set by a program.
Dec 08, 2006
b3 b2 b1 b0
0
Registers WDTR, WDTS, and CSPR
0
b0
b0
0
When 00h is w ritten before w riting FFh, the w atchdog timer is reset.
The default value of the w atchdog timer is 7FFFh w hen count source protection
mode is disabled and 0FFFh w hen count source protection mode is enabled.
The w atchdog timer starts counting after a w rite instruction to this register.
Bit Symbol
(b6-b0)
CSPRO
Symbol
Symbol
Symbol
WDTR
WDTS
CSPR
Page 105 of 315
Reserved bits
Count source protection mode
select bit
Address
Address
(2)
000Dh
000Eh
Address
Bit Name
001Ch
Function
Function
Set to 0.
0 : Count source protection mode disabled
1 : Count source protection mode enabled
After Reset
After Reset
Undefined
Undefined
After Reset
Function
00h
(1)
(1)
(2)
13. Watchdog Timer
WO
WO
RW
RW
RW
RW
RW

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