R5F211B1SP#U0 Renesas Electronics America, R5F211B1SP#U0 Datasheet - Page 90

IC R8C MCU FLASH 4K 20SSOP

R5F211B1SP#U0

Manufacturer Part Number
R5F211B1SP#U0
Description
IC R8C MCU FLASH 4K 20SSOP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/R8C/Tiny/1Br
Datasheets

Specifications of R5F211B1SP#U0

Core Processor
R8C
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, SIO, SSU, UART/USART
Peripherals
LED, POR, Voltage Detect, WDT
Number Of I /o
13
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
20-SSOP
For Use With
R0K5211B4S001BE - KIT STARTER FOR R8C/18191A1BR0K5211B4S000BE - KIT DEV EVALUATION R8C/1BR0E521174CPE10 - EMULATOR COMPACT R8C/18/19/1
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F211B1SP#U0R5F211B1SP#V0
Manufacturer:
MICREL
Quantity:
2 860
R8C/1A Group, R8C/1B Group
Rev.1.30
REJ09B0252-0130
10.4.3
Table 10.4
Key input interrupt
INT0 to INT1 interrupts
INT3 interrupt
Timer X interrupt
Serial interface interrupt
Voltage monitor 2 interrupt
10.4.3.1
10.4.3.2
10.4.3.3
Since the oscillator circuits stop in stop mode, the CPU clock and peripheral function clock stop and the CPU
and peripheral functions that use these clocks stop operating. The least power required to operate the MCU is in
stop mode. If the voltage applied to the VCC pin is VRAM or more, the contents of internal RAM is
maintained.
The peripheral functions clocked by external signals continue operating. Table 10.4 lists Interrupts to Exit Stop
Mode and Usage Conditions.
The MCU enters stop mode when the CM10 bit in the CM1 register is set to 1 (all clocks stop). At the same
time, the CM06 bit in the CM0 register is set to 1 (divide-by-8 mode) and the CM15 bit in the CM10 register is
set to 1 (main clock oscillator circuit drive capability high).
When using stop mode, set bits OCD1 to OCD0 to 00b (oscillation stop detection function disabled) before
entering stop mode.
The status before wait mode was entered is maintained.
However, when the CM13 bit in the CM1 register is set to 1 (XIN-XOUT pins), the XOUT(P4_7) pin is held
“H”. When the CM13 bit is set to 0 (input ports P4_6 and P4_7), the P4_7(XOUT) pin is held in input status.
The MCU exits stop mode by a hardware reset or peripheral function interrupt.
Figure 10.9 shows the Time from Stop Mode to Interrupt Routine Execution.
When using a hardware reset to exit stop mode, set bits ILVL2 to ILVL0 for the peripheral function interrupts
to 000b (interrupts disabled) before setting the CM10 bit to 1.
When using a peripheral function interrupt to exit stop mode, set up the following before setting the CM10 bit
to 1.
The CPU clock, when exiting stop mode by a peripheral function interrupt, is the divide-by-8 of the clock
which was used before stop mode was entered.
(1) Set the interrupt priority level in bits ILVL2 to ILVL0 of the peripheral function interrupts to be used
(2) Set the I flag to 1.
(3) Operate the peripheral function to be used for exiting stop mode.
Dec 08, 2006
Stop Mode
for exiting stop mode. Set bits ILVL2 to ILVL0 of the peripheral function interrupts that are not to be
used for exiting stop mode to 000b (interrupt disabled).
When exiting by a peripheral function interrupt, the interrupt sequence is executed when an interrupt
request is generated and the CPU clock supply is started.
Entering Stop Mode
Pin Status in Stop Mode
Exiting Stop Mode
Interrupts to Exit Stop Mode and Usage Conditions
Interrupt
Page 72 of 315
INT0 can be used if there is no filter.
No filter. Interrupt request is generated at INT3 input (TCC06 bit in
TCC0 register is set to 1).
When external pulse is counted in event counter mode.
When external clock is selected.
Usable in digital filter disabled mode (VW2C1 bit in VW2C register
is set to 1)
Usage Conditions
10. Clock Generation Circuit

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