R5F211B1SP#U0 Renesas Electronics America, R5F211B1SP#U0 Datasheet - Page 229

• Manufacturer Part Number: R5F211B1SP#U0
• Description: IC R8C MCU FLASH 4K 20SSOP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/R8C/Tiny/1Br

Specifications of R5F211B1SP#U0

• Core Processor: R8C
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SIO, SSU, UART/USART
• Peripherals: LED, POR, Voltage Detect, WDT
• Number Of I /o: 13
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 20-SSOP
• For Use With: R0K5211B4S001BE - KIT STARTER FOR R8C/18191A1BR0K5211B4S000BE - KIT DEV EVALUATION R8C/1BR0E521174CPE10 - EMULATOR COMPACT R8C/18/19/1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/1A Group, R8C/1B Group
Rev.1.30
REJ09B0252-0130
Figure 16.32
16.3.3
(1) I
(2) I
Explanation of symbols
S
SLA
R/W
A
DATA : Transmit / receive data
P
16.3.3.1
(a) I
(b) I
2
2
C bus format
C bus timing
Setting the FS bit in the SAR register to 0 communicates in I
Figure 16.32 shows the I
8 bits.
: Start condition
: Slave address
: Indicates the direction of data transmit/receive
2
2
: Acknowledge
: Stop condition
The master device changes the SDA signal from “L” to “H” while the SCL signal is held “H”.
C bus format (FS = 0)
C bus format (when start condition is retransmitted, FS = 0)
The master device changes the SDA signal from “H” to “L” while the SCL signal is held “H”.
Data is transmitted from the slave device to the master device when R/W value is 1 and from the master device to the slave device when
The receive device sets the SDA signal to “L”.
R/W value is 0.
SDA
SCL
Dec 08, 2006
S
S
1
1
I
2
C bus Interface Mode
S
I
I
2
2
C bus Format and Bus Timing
C bus Format
SLA
SLA
7
7
1 to 7
SLA
1
1
Page 211 of 315
R/W
R/W
8
1
1
R/W
2
C bus Format and Bus Timing. The 1st frame following the start condition consists of
A
A
1
1
9
A
DATA
DATA
n
n1
1 to 7
m1
DATA
8
A
1
m
A/A
1
9
A
S
1
A/A
2
1 to 7
1
C bus format.
SLA
7
P
1
DATA
1
Transfer bit count (n = 1 to 8)
Transfer frame count (m = from 1)
8
16. Clock Synchronous Serial Interface
R/W
1
9
A
Upper: Transfer bit count (n1, n2 = 1 to 8)
Lower: Transfer frame count (m1, m2 = 1 or more)
A
1
P
DATA
n2
m2
A/A
1
P
1