R5F211B1SP#U0 Renesas Electronics America, R5F211B1SP#U0 Datasheet - Page 79

• Manufacturer Part Number: R5F211B1SP#U0
• Description: IC R8C MCU FLASH 4K 20SSOP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/R8C/Tiny/1Br

Specifications of R5F211B1SP#U0

• Core Processor: R8C
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SIO, SSU, UART/USART
• Peripherals: LED, POR, Voltage Detect, WDT
• Number Of I /o: 13
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 20-SSOP
• For Use With: R0K5211B4S001BE - KIT STARTER FOR R8C/18191A1BR0K5211B4S000BE - KIT DEV EVALUATION R8C/1BR0E521174CPE10 - EMULATOR COMPACT R8C/18/19/1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/1A Group, R8C/1B Group
Rev.1.30
REJ09B0252-0130
Figure 10.3
System Clock Control Register 1
b7 b6 b5 b4 b3 b2 b1 b0
NOTES :
1.
2.
3.
4.
5.
6.
7.
8.
Set the PRC0 bit in the PRCR register to 1 (w rite enable) before rew riting the CM1 register.
When entering stop mode from high or medium speed mode, this bit is set to 1 (drive capacity high).
When the CM06 bit is set to 0 (bits CM16, CM17 enabled), bits CM16 to CM17 are enabled.
If the CM10 bit is set to 1 (stop mode), the on-chip feedback resistor is disabled.
When the OCD2 bit is set to 0 (main clock selected), the CM14 bit is set to 1 (low -speed
on-chip oscillator stopped). When the OCD2 bit is set to 1 (on-chip oscillator clock selected), the CM14 bit is set to 0
(low -speed on-chip oscillator on). And remains unchanged even if 1 is w ritten to it.
When using the voltage detection interrupt, set the CM14 bit to 0 (low -speed on-chip oscillator on).
When the CM10 bit is set to 1 (stop mode), or the CM05 bit in the CM0 register to 1 (main clock stops) and the CM13
bit is set to 1 (XIN-XOUT pin), the XOUT (P4_7) pin becomes “H”.
When the CM13 bit is set to 0 (input ports, P4_6, P4_7), P4_7 (XOUT) enters input mode.
In count source protect mode (refer to 13.2 Count Source Protect Mode), the value remains unchanged even if
bits CM10 and CM14 are set.
Dec 08, 2006
0 0
CM1 Register
Bit Symbol
Symbol
CM10
CM13
CM14
CM15
CM16
CM17
CM1
(b1)
(b2)
Page 61 of 315
—
—
All clock stop control bit
Reserved bit
Reserved bit
Port XIN-XOUT sw itch bit
Low -speed on-chip oscillation stop
bit
XIN-XOUT drive capacity select bit
System clock division select bits 1
(1)
(5,6,8)
Address
Bit Name
0007h
(4,7,8)
(7)
(3)
(2)
0 : Clock operates.
1 : Stops all clocks (stop mode).
Set to 0.
Set to 0.
0 : Input port P4_6, P4_7
1 : XIN-XOUT Pin
0 : Low -speed on-chip oscillator on
1 : Low -speed on-chip oscillator off
0 : Low
1 : High
b7 b6
0 0 : No division mode
0 1 : Divide-by-2 mode
1 0 : Divide-by-4 mode
1 1 : Divide-by-16 mode
After Reset
Function
20h
10. Clock Generation Circuit
RW
RW
RW
RW
RW
RW
RW
RW
RW