EP2AGX190EF29I5N Altera, EP2AGX190EF29I5N Datasheet - Page 103

• Manufacturer Part Number: EP2AGX190EF29I5N
• Description: IC ARRIA II GX FPGA 190K 780FBGA
• Manufacturer: Altera
• Series: Arria II GXr

Specifications of EP2AGX190EF29I5N

• Number Of Logic Elements/cells: 181165
• Number Of Labs/clbs: 7612
• Total Ram Bits: 9939
• Number Of I /o: 372
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 780-FBGA
• Family Name: Arria® II GX
• Number Of Logic Blocks/elements: 190300
• # I/os (max): 372
• Frequency (max): 500MHz
• Operating Supply Voltage (typ): 900mV
• Logic Cells: 190300
• Ram Bits: 10380902.4
• Operating Supply Voltage (min): 0.87V
• Operating Supply Voltage (max): 0.93V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 780
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

Chapter 4: DSP Blocks in Arria II Devices
Software Support for Arria II Devices
Table 4–9. DSP Block Dynamic Signals for DSP Block in Arria II Devices (Part 2 of 2)
Software Support for Arria II Devices
December 2010 Altera Corporation
shift_right
DSP Block Dynamic Signals per Full-DSP Block
clock0
clock1
clock2
clock3
ena0
ena1
ena2
ena3
aclr0
aclr1
aclr2
aclr3
Total Count per Half- and Full-DSP Blocks
Signal Name
f
f
Altera provides two distinct methods for implementing various modes of the DSP
block in a design: instantiation and inference. Both methods use the following
Quartus II megafunctions:
■
■
■
■
You can instantiate the megafunctions in the Quartus II software to use the DSP block.
Alternatively, with inference, you can create an HDL design and synthesize it with a
third-party synthesis tool (such as LeonardoSpectrum, Synplify, or Quartus II Native
Synthesis) that infers the appropriate megafunction by recognizing multipliers,
multiplier adders, multiplier accumulators, and shift functions. With either method,
the Quartus II software maps the functionality to the DSP blocks during compilation.
For instructions about using the megafunctions and the MegaWizard Plug-In
Manager, refer to the Quartus II Software Help.
For more information, refer to
Handbook.
LPM_MULT
ALTMULT_ADD
ALTMULT_ACCUM
ALTFP_MULT
shift_right = 1, shift right feature is enabled
DSP-block-wide clock signals
Input and Pipeline Register enable signals
DSP block-wide asynchronous clear signals (active low)
Section III: Synthesis
Function
Arria II Device Handbook Volume 1: Device Interfaces and Integration
in volume 1 of the Quartus II
Count
33
1
4
4
4
4–31