EP2AGX190EF29I5N Altera, EP2AGX190EF29I5N Datasheet - Page 281

• Manufacturer Part Number: EP2AGX190EF29I5N
• Description: IC ARRIA II GX FPGA 190K 780FBGA
• Manufacturer: Altera
• Series: Arria II GXr

Specifications of EP2AGX190EF29I5N

• Number Of Logic Elements/cells: 181165
• Number Of Labs/clbs: 7612
• Total Ram Bits: 9939
• Number Of I /o: 372
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 780-FBGA
• Family Name: Arria® II GX
• Number Of Logic Blocks/elements: 190300
• # I/os (max): 372
• Frequency (max): 500MHz
• Operating Supply Voltage (typ): 900mV
• Logic Cells: 190300
• Ram Bits: 10380902.4
• Operating Supply Voltage (min): 0.87V
• Operating Supply Voltage (max): 0.93V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 780
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

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AIIGX51009-4.0
Arria II Device Handbook Volume 1: Device Interfaces and Integration
December 2010
December 2010
AIIGX51009-4.0
This chapter describes the supported configuration schemes for Arria
instructions for executing the required configuration schemes, and all the necessary
option pin settings. This chapter also reviews the different ways you can configure
your device and explains the design security and remote system upgrade features for
Arria II devices.
Arria II devices use SRAM cells to store configuration data. Because SRAM memory is
volatile, you must download configuration data to the Arria II device each time the
device powers up. All configuration schemes use either an external controller (for
example, a MAX
cable.
This chapter includes the following sections:
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“Configuration Features”
“Power-On Reset Circuit and Configuration Pins Power Supply” on page 9–4
“Configuration Process” on page 9–7
“Configuration Schemes” on page 9–9
“Fast Passive Parallel Configuration” on page 9–11
“AS and Fast AS Configuration (Serial Configuration Devices)” on page 9–19
“PS Configuration” on page 9–26
“JTAG Configuration” on page 9–33
“Device Configuration Pins” on page 9–39
“Configuration Data Decompression” on page 9–46
“Remote System Upgrades” on page 9–48
“Remote System Upgrade Mode” on page 9–52
“Dedicated Remote System Upgrade Circuitry” on page 9–55
“Quartus II Software Support” on page 9–60
“Design Security” on page 9–61
®
II device or microprocessor), a configuration device, or a download
9. Configuration, Design Security, and
Remote System Upgrades in Arria II
®
II devices,
Devices
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