EP2AGX190EF29I5N Altera, EP2AGX190EF29I5N Datasheet - Page 560

• Manufacturer Part Number: EP2AGX190EF29I5N
• Description: IC ARRIA II GX FPGA 190K 780FBGA
• Manufacturer: Altera
• Series: Arria II GXr

Specifications of EP2AGX190EF29I5N

• Number Of Logic Elements/cells: 181165
• Number Of Labs/clbs: 7612
• Total Ram Bits: 9939
• Number Of I /o: 372
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 780-FBGA
• Family Name: Arria® II GX
• Number Of Logic Blocks/elements: 190300
• # I/os (max): 372
• Frequency (max): 500MHz
• Operating Supply Voltage (typ): 900mV
• Logic Cells: 190300
• Ram Bits: 10380902.4
• Operating Supply Voltage (min): 0.87V
• Operating Supply Voltage (max): 0.93V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 780
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

3–2
Creating Transceiver Channel Instances
General Requirements to Combine Channels
Arria II Device Handbook Volume 2: Transceivers
Control Signals
Calibration Clock and Power Down
f
You can instantiate multiple transceiver channels in the General screen of the ALTGX
MegaWizard Plug-In Manager in the following two different ways:
■
■
When you create instances using the above methods, you can force the placement of
up to four transceiver channels within the same transceiver block by assigning the
tx_dataout and rx_datain ports of the channel instances to a single transceiver bank.
If you do not assign pins to the tx_dataout and rx_datain ports, the Quartus II
software chooses default pin assignments. When you compile the design, the
Quartus II software combines multiple channel instances within the same transceiver
block if the instances meet specific requirements. The following sections describe
these requirements for different transceiver configurations.
When you create multiple ALTGX instances, the Quartus II software requires that you
set identical values on the following parameters and signals to combine the ALTGX
instances within the same transceiver block or in the transceiver blocks on the same
side of the device. The following sections describe these requirements.
The gxb_powerdown port is an optional port that you can enable in the ALTGX
MegaWizard Plug-In Manager. If enabled, you must drive the gxb_powerdown port in
the ALTGX instances from the same logic or the same input pin to enable the
Quartus II software to assign them in the same transceiver block. If you disable the
gxb_powerdown port, the Quartus II software ties the port to ground.
Each calibration block in an Arria II GX or GZ device is shared by multiple transceiver
blocks.
If your design uses multiple transceiver blocks, depending on the transceiver banks
selected, you must connect the cal_blk_clk and cal_blk_powerdown ports of all
channel instances to the same input pin or logic.
For more information about the calibration block and transceiver banks that are
connected to a specific calibration block, refer to the “Calibration Block” section in the
Transceiver Architecture in Arria II Devices
For the What is the number of channels? option, select the required value. This
method creates the transceiver channels with identical configurations. For
examples, refer to
Blocks” on page
For the What is the number of channels? option, select 1 and create a single
channel transceiver instance. To instantiate additional transceiver channels with
an identical configuration, stamp the created ALTGX instance multiple times. If
you require additional transceiver channels with different configurations, create
separate ALTGX megafunction instances with different settings and use them in
your design.
3–13.
“Combining Transceiver Instances in Multiple Transceiver
Chapter 3: Configuring Multiple Protocols and Data Rates in Arria II Devices
chapter.
Creating Transceiver Channel Instances
December 2010 Altera Corporation