EP2AGX190EF29I5N Altera, EP2AGX190EF29I5N Datasheet - Page 337

• Manufacturer Part Number: EP2AGX190EF29I5N
• Description: IC ARRIA II GX FPGA 190K 780FBGA
• Manufacturer: Altera
• Series: Arria II GXr

Specifications of EP2AGX190EF29I5N

• Number Of Logic Elements/cells: 181165
• Number Of Labs/clbs: 7612
• Total Ram Bits: 9939
• Number Of I /o: 372
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 780-FBGA
• Family Name: Arria® II GX
• Number Of Logic Blocks/elements: 190300
• # I/os (max): 372
• Frequency (max): 500MHz
• Operating Supply Voltage (typ): 900mV
• Logic Cells: 190300
• Ram Bits: 10380902.4
• Operating Supply Voltage (min): 0.87V
• Operating Supply Voltage (max): 0.93V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 780
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

Chapter 9: Configuration, Design Security, and Remote System Upgrades in Arria II Devices
Dedicated Remote System Upgrade Circuitry
Table 9–20. Remote System Upgrade Control Register Contents
December 2010 Altera Corporation
AnF
PGM[23..0]
Wd_en
Wd_timer[11..0]
Notes to
(1) This is the default value of the control register bit.
(2) In remote update mode, the remote configuration block does not update the AnF bit automatically (you can update it manually).
Control Register Bit
(2)
Table
9–20:
The application-not-factory (AnF) bit indicates whether the current configuration
loaded in the Arria II device is the factory configuration or an application
configuration. This bit is set low by the remote system upgrade circuitry when an
error condition causes a fall-back to the factory configuration. When the AnF bit is
high, the control register access is limited to read operations. When the AnF bit is low,
the register allows write operations and disables the watchdog timer.
In remote update mode, the factory configuration design sets this bit high (1'b1) when
updating the contents of the update register with the application page address and
watchdog timer settings.
Table 9–20
Remote System Upgrade Status Register
The remote system upgrade status register specifies the reconfiguration trigger
condition. The various trigger and error conditions include:
■
■
■
■
■
The contents of the status register are shown in
The numbers in the figure show the bit positions within a 5-bit register.
Figure 9–27. Remote System Upgrade Status Register
Cyclic redundancy check (CRC) error during application configuration
nSTATUS assertion by an external device due to an error
Arria II device logic array triggered a reconfiguration cycle, possibly after
downloading a new application configuration image
External configuration reset (nCONFIG) assertion
User watchdog timer time-out
Remote System
lists the remote system upgrade control register contents.
Remote update
Remote update
Remote update
Remote update
Upgrade Mode
Wd
4
nCONFIG
3
12'b000000000000
24'b0×000000
Arria II Device Handbook Volume 1: Device Interfaces and Integration
Value
Core_nCONFIG
1'b0
1'b0
(1)
2
Figure 9–27
nSTATUS
1
Application not factory
AS configuration start address
(StAdd[23..0])
User watchdog timer enable bit
User watchdog time-out value (most
significant 12 bits of 29-bit count
value: {Wd_timer[11..0],
17'b0})
CRC
and listed in
0
Definition
Table
9–21.
9–57