EP2AGX190EF29I5N Altera, EP2AGX190EF29I5N Datasheet - Page 72

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EP2AGX190EF29I5N

Manufacturer Part Number
EP2AGX190EF29I5N
Description
IC ARRIA II GX FPGA 190K 780FBGA
Manufacturer
Altera
Series
Arria II GXr

Specifications of EP2AGX190EF29I5N

Number Of Logic Elements/cells
181165
Number Of Labs/clbs
7612
Total Ram Bits
9939
Number Of I /o
372
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
780-FBGA
Family Name
Arria® II GX
Number Of Logic Blocks/elements
190300
# I/os (max)
372
Frequency (max)
500MHz
Operating Supply Voltage (typ)
900mV
Logic Cells
190300
Ram Bits
10380902.4
Operating Supply Voltage (min)
0.87V
Operating Supply Voltage (max)
0.93V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
780
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
EP2AGX190EF29I5N
Manufacturer:
Altera
Quantity:
10 000
Part Number:
EP2AGX190EF29I5N
Manufacturer:
ALTERA
0
Part Number:
EP2AGX190EF29I5N
Manufacturer:
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Quantity:
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Part Number:
EP2AGX190EF29I5N
0
3–26
Document Revision History
Table 3–10. Document Revision History
Arria II Device Handbook Volume 1: Device Interfaces and Integration
December 2010
November 2009
June 2009
February 2009
Date
Version
Table 3–10
3.0
2.0
1.1
1.0
Updated for Arria II GX v9.1 release:
Initial release
Updated for the Quartus II software version 10.1 release.
Added Arria II GZ devices information.
Updated
Updated
Added
Added
Added
Minor text edit.
Updated Table 3–2
Updated Figure 3–16
Minor text edit
Updated Table 3–1
Updated “Byte Enable Support”, “Simple Dual-Port Mode”, and “Read and Write Clock
Mode” sections
Updated Figure 3–1, Figure 3–2, Figure 3–5, Figure 3–9, Figure 3–12, Figure 3–18,
Figure 3–19, and Figure 3–20
Added Figure 3–2, Figure 3–6, Figure 3–10, and Figure 3–13
shows the revision history for this document.
Table 3–6
Figure
“Error Correction Code Support”
Table 3–1
Figure
3–10,
3–10,
and
and
Figure
Table
Figure
Table
3–15,
3–8.
3–12, and
3–2.
Figure
Changes
Figure
section.
3–21,
3–16.
Figure
Chapter 3: Memory Blocks in Arria II Devices
3–23, and
December 2010 Altera Corporation
Figure
Document Revision History
3–24.

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