EP2AGX190EF29I5N Altera, EP2AGX190EF29I5N Datasheet - Page 48

• Manufacturer Part Number: EP2AGX190EF29I5N
• Description: IC ARRIA II GX FPGA 190K 780FBGA
• Manufacturer: Altera
• Series: Arria II GXr

Specifications of EP2AGX190EF29I5N

• Number Of Logic Elements/cells: 181165
• Number Of Labs/clbs: 7612
• Total Ram Bits: 9939
• Number Of I /o: 372
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 780-FBGA
• Family Name: Arria® II GX
• Number Of Logic Blocks/elements: 190300
• # I/os (max): 372
• Frequency (max): 500MHz
• Operating Supply Voltage (typ): 900mV
• Logic Cells: 190300
• Ram Bits: 10380902.4
• Operating Supply Voltage (min): 0.87V
• Operating Supply Voltage (max): 0.93V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 780
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

3–2
Memory Features
Table 3–1. Summary of Memory Features in Arria II Devices (Part 1 of 2)
Arria II Device Handbook Volume 1: Device Interfaces and Integration
Maximum performance
Total RAM bits (including parity
bits)
Configurations (depth × width)
Parity bits
Byte enable
Packed mode
Address clock enable
Single-port memory
Simple dual-port memory
True dual-port memory
Embedded shift register
ROM
FIFO buffer
Simple dual-port mixed width
support
True dual-port mixed width
support
Memory initialization file (.mif)
Mixed-clock mode
Power-up condition
Register clears
Write/Read operation triggering
Feature
Table 3–1
lists the features supported by the embedded memory blocks.
500 MHz
Outputs cleared if registered,
Arria II GX
Write: Falling clock edges.
otherwise reads memory
Read: Rising clock edges
64 × 10
32 × 16
32 × 18
32 × 20
64 × 8
64 × 9
640
v
v
v
v
v
v
v
v
v
v
—
—
—
—
Output registers
(1)
contents.
MLABs
Arria II GZ
500 MHz
64 × 10
32 × 16
32 × 18
32 × 20
64 × 8
64 × 9
640
v
v
v
v
v
v
v
v
v
v
—
—
—
—
390 MHz
Write and Read: Rising clock
Arria II GX
512 × 16
512 × 18
256 × 32
256 × 36
8K × 1
4K × 2
2K × 4
1K × 8
1K × 9
9,216
v
v
v
v
v
v
v
v
v
v
v
v
v
v
Outputs cleared
Output registers
M9K Blocks
(1)
Chapter 3: Memory Blocks in Arria II Devices
edges
Arria II GZ
540 MHz
512 × 16
512 × 18
256 × 32
256 × 36
8K × 1
4K × 2
2K × 4
1K × 8
1K × 9
December 2010 Altera Corporation
9,216
v
v
v
v
v
v
v
v
v
v
v
v
v
v
Output registers
Write and Read:
Outputs cleared
M144K Blocks
Rising clock
Memory Features
Arria II GZ
500 MHz
147,456
16K × 8
16K × 9
8K × 16
8K × 18
4K × 32
4K × 36
2K × 64
2K × 72
edges
v
v
v
v
v
v
v
v
v
v
v
v
v
v