EP2AGX190EF29I5N Altera, EP2AGX190EF29I5N Datasheet - Page 52

• Manufacturer Part Number: EP2AGX190EF29I5N
• Description: IC ARRIA II GX FPGA 190K 780FBGA
• Manufacturer: Altera
• Series: Arria II GXr

Specifications of EP2AGX190EF29I5N

• Number Of Logic Elements/cells: 181165
• Number Of Labs/clbs: 7612
• Total Ram Bits: 9939
• Number Of I /o: 372
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 780-FBGA
• Family Name: Arria® II GX
• Number Of Logic Blocks/elements: 190300
• # I/os (max): 372
• Frequency (max): 500MHz
• Operating Supply Voltage (typ): 900mV
• Logic Cells: 190300
• Ram Bits: 10380902.4
• Operating Supply Voltage (min): 0.87V
• Operating Supply Voltage (max): 0.93V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 780
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

3–6
Figure 3–4. Address Clock Enable During Read Cycle Waveform
Arria II Device Handbook Volume 1: Device Interfaces and Integration
rdaddress
rden
addressstall
latched address
(inside memory)
q (synch)
q (asynch)
inclock
Figure 3–3
addressstall refers to the address clock enable.
Figure 3–3. Address Clock Enable
Figure 3–4
doutn-1
doutn
shows an address clock enable block diagram. The port name
shows the address clock enable waveform during the read cycle.
an
a0
addressstall
address[0]
address[N]
doutn
a0
dout0
clock
a1
dout0
a2
1
0
1
0
a1
dout1
a3
address[N]
address[0]
register
register
dout1
a4
Chapter 3: Memory Blocks in Arria II Devices
a4
dout4
address[N]
a5
address[0]
December 2010 Altera Corporation
dout4
a5
dout5
a6
Memory Features