EP2AGX190EF29I5N Altera, EP2AGX190EF29I5N Datasheet - Page 90

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EP2AGX190EF29I5N

Manufacturer Part Number
EP2AGX190EF29I5N
Description
IC ARRIA II GX FPGA 190K 780FBGA
Manufacturer
Altera
Series
Arria II GXr

Specifications of EP2AGX190EF29I5N

Number Of Logic Elements/cells
181165
Number Of Labs/clbs
7612
Total Ram Bits
9939
Number Of I /o
372
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
780-FBGA
Family Name
Arria® II GX
Number Of Logic Blocks/elements
190300
# I/os (max)
372
Frequency (max)
500MHz
Operating Supply Voltage (typ)
900mV
Logic Cells
190300
Ram Bits
10380902.4
Operating Supply Voltage (min)
0.87V
Operating Supply Voltage (max)
0.93V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
780
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant

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4–18
Arria II Device Handbook Volume 1: Device Interfaces and Integration
Double Multiplier
You can configure the Arria II DSP block to support an unsigned 54 × 54-bit multiplier
that is required to compute the mantissa portion of an IEEE double precision floating
point multiplication. You can build a 54 × 54-bit multiplier with basic 18 × 18
multipliers, shifters, and adders. To efficiently use built-in shifters and adders in the
Arria II DSP block, a special double mode (partial 54 × 54 multiplier) is available that
is a slight modification to the basic 36 × 36 multiplier mode, as shown in
and
Figure 4–11. Double Mode Shown for a Half DSP Block
dataa_0[35..18]
datab_0[35..18]
datab_0[35..18]
dataa_0[35..18]
datab_0[17..0]
dataa_0[17..0]
dataa_0[17..0]
datab_0[17..0]
Figure
clock[3..0]
ena[3..0]
aclr[3..0]
4–12.
Half-DSP Block
signa
signb
+
+
+
Chapter 4: DSP Blocks in Arria II Devices
Arria II Operational Mode Descriptions
December 2010 Altera Corporation
72
Figure 4–11
result[ ]

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