NS7520B-1-I46 Digi International, NS7520B-1-I46 Datasheet - Page 133
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NS7520B-1-I46
Manufacturer Part Number
NS7520B-1-I46
Description
IC ARM MICROPROCESSOR 177BGA
Manufacturer
Digi International
Series
NET+ARM®r
Specifications of NS7520B-1-I46
Applications
Network Processor
Core Processor
ARM7
Program Memory Type
External Program Memory
Controller Series
-
Ram Size
External
Interface
EBI/EMI, Ethernet, DMA, SPI, UART
Number Of I /o
16
Voltage - Supply
1.4 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
177-LFBGA
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
NS7520B-1-I46
Manufacturer:
Digi International
Quantity:
10 000
Part Number:
NS7520B-1-I46
Manufacturer:
NETARM
Quantity:
20 000
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Figure 12: SDRAM burst read
TEA_(LAST_) {output}
TEA_(LAST_) {input}
The precharge command is issued, when necessary, during the T1 phase of a
normal or burst read cycle. The precharge command is issued only when the
row selection for the NS7520 has changed since the last access. Each chip
select maintains a 14-bit register identifying the last row accessed.
Additional clock cycles are inserted between the precharge command and
the active command, depending on the WAIT configuration.
The active command is always issued after the precharge command, and
selects a newly activated row address. Additional clock cycles are inserted
between the active command and the read command, depending on the
WAIT configuration.
The read command is issued in either the T1 or TW states, depending on
whether a precharge command was required. The read command selects
the starting column address for the current burst read operation. Additional
CAS3_(RAS_)
CAS2_(CAS_)
CAS1_(WE_)
TA_ {output}
TA_ {input}
CS[7:0]_
BE[3:0]
D[31:0]
A[13:0]
AMUX
BCLK
RW_
TS_
read
nop
w w w . d i g i e m b e d d e d . c o m
One Valid Per Cy cle
nop
M e m o r y C o n t r o l l e r M o d u l e
nop
bstop
inhibit
1 2 1
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