NS7520B-1-I46 Digi International, NS7520B-1-I46 Datasheet - Page 28

• Manufacturer Part Number: NS7520B-1-I46
• Description: IC ARM MICROPROCESSOR 177BGA
• Manufacturer: Digi International
• Series: NET+ARM®r

Specifications of NS7520B-1-I46

• Applications: Network Processor
• Core Processor: ARM7
• Program Memory Type: External Program Memory
• Controller Series: -
• Ram Size: External
• Interface: EBI/EMI, Ethernet, DMA, SPI, UART
• Number Of I /o: 16
• Voltage - Supply: 1.4 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 177-LFBGA
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Chip select controller
1 6
P i n o u t d e t a i l t a b l e s a n d s i g n a l d e s c r i p t i o n s
Table 3: System bus interface signal description
The NS7520 supports five unique chip select configurations:
Table 4: Chip select controller pinout
TEA_
RW_
BR_
BG_
BUSY_
CS4_
CS3_
CS2_
CS1_
CS0_
CAS3_
CAS2_
Mnemonic
Symbol
N S 7 5 2 0 H a r d w a r e R e f e r e n c e , R e v G 9 / 2 0 0 7
Transfer error acknowledge Indicates an error termination or burst cycle termination:
Read/write indicator
Bus request
Bus grant
Bus busy
Signal
B4
A4
C5
B5
D5
A1
C4
Pin
O
O
O
O
O
O
O
I/O
This signal is driven to 1 prior to tri-stating its driver.
TEA_ is bi-directional. The NS7520 or the external
peripheral can drive this signal.
Indicates the direction of the system bus memory cycle.
RW_ high indicates a read operation; RW_ low indicates a
write operation. The RW_ signal is bi-directional.
NO CONNECT
NO CONNECT
NO CONNECT
Description
4
4
4
4
4
4
4
OD
cycle.
during the current bus cycle. TEA_ terminates the
current burst cycle.
In conjunction with TA_ to signal the end of a burst
Independently of TA_ to signal that an error occurred
Chip select/DRAM RAS_
Chip select/DRAM RAS_
Chip select/DRAM RAS_
Chip select/DRAM RAS_
Chip select (boot select)
FP/EDO DRAM column strobe
D31:D24/SDRAM RAS_
FP/EDO DRAM column strobe
D23:D16/SDRAM CAS_
Description