NS7520B-1-I46 Digi International, NS7520B-1-I46 Datasheet - Page 241

• Manufacturer Part Number: NS7520B-1-I46
• Description: IC ARM MICROPROCESSOR 177BGA
• Manufacturer: Digi International
• Series: NET+ARM®r

Specifications of NS7520B-1-I46

• Applications: Network Processor
• Core Processor: ARM7
• Program Memory Type: External Program Memory
• Controller Series: -
• Ram Size: External
• Interface: EBI/EMI, Ethernet, DMA, SPI, UART
• Number Of I /o: 16
• Voltage - Supply: 1.4 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 177-LFBGA
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Serial Channel 1, 2 Control Register B
Address: FFD0 0004 / 44
Register bit assignment
Table 88: Serial Channel Control Register B bit definition
D31
D30
D29
D28
D27
D26
Bit
RDM1
RTS
TX
15
31
RDM2
30
14
R/W
R/W
R/W
R/W
R/W
R/W
Access
Reserved
RDM3
29
13
RDM4
28
12
RDM1
RDM2
RDM3
RDM4
RBGT
RCGT
Mnemonic
RBGT
27
11
RCGT
TENC
26
10
25
9
0
0
0
0
0
0
Reset
24
8
Reserved
Enable receive data match 1/2/3/4
When the serial channel is configured to operate in
UART mode, the RDM bits enable the receive data
match comparators. A receive data match comparison
detection can be used to close the current receive
buffer descriptor. The last byte in the current receive
data buffer contains the match character. Each of
these bits enables the respective byte in the Receive
Match register.
Enable receive buffer GAP timer
Detects the maximum allowed time from when the
first byte is placed into the receive data buffer and
when the receive data buffer is closed.
When RBGT is set to 1, the BGAP field in Serial
Channel Status Register A is set when the timeout
value defined in the Receive Buffer GAP Timer
register has expired.
Enable receive character GAP timer
Detects the maximum allowed time from when the
last byte is placed into the receive data buffer and
when the receive data buffer us closed.
When RCGT is set to 1, the CGAP field in Serial
Channel Status Register A is set when the timeout
value defined in the Receive Buffer Character Timer
register has expired.
Description
RDEC
w w w . d i g i e m b e d d e d . c o m
23
7
22
6
21
5
MODE
S e r i a l C o n t r o l l e r M o d u l e
20
4
ORDR
BIT
19
3
Reserved
18
2
Reserved
17
1
16
0
2 2 9