NS7520B-1-I46 Digi International, NS7520B-1-I46 Datasheet - Page 239

• Manufacturer Part Number: NS7520B-1-I46
• Description: IC ARM MICROPROCESSOR 177BGA
• Manufacturer: Digi International
• Series: NET+ARM®r

Specifications of NS7520B-1-I46

• Applications: Network Processor
• Core Processor: ARM7
• Program Memory Type: External Program Memory
• Controller Series: -
• Ram Size: External
• Interface: EBI/EMI, Ethernet, DMA, SPI, UART
• Number Of I /o: 16
• Voltage - Supply: 1.4 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 177-LFBGA
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Table 85: Serial Channel Control Register A
Receiver interrupts
Table 86: Receiver interrupt enable bits
D04:01
D00
D15
D14
D13
D12
D11
D10
D09
D07
D06
D05
Bits
Bit
R/W
R/W
Access
ERXBRT
ERFE
ERXPE
ERXORUN
ERXRDY
ERXHALF
ERXBC
ERXDCD
ERXRI
ERXDSR
Mnemonic
IE
ETXDMA
Mnemonic
0
0
Reset
Receive break interrupt enable
Receive framing error interrupt enable
Receive parity error interrupt enable
Receive overrun interrupt enable
Receive register ready interrupt enable
Receive FIFO half-full interrupt enable
Receive buffer closed interrupt enable
Change in DCD interrupt enable
Change in RI interrupt enable
Change in DSR interrupt enable
Description
Transmitter interrupt condition
The interrupt enable bits are used to enable an
interrupt when the respective status bit is set in Serial
Channel Status A.
Table 87, “Transmitter interrupt enable bits,” on
page 228, lists individual bit numbers and
descriptions.
Enable transmit DMA requests
Enables the transmitter to interact with a DMA
channel. When configured to operate in DMA mode,
the DMA controller loads the transmit data FIFO from
memory.
Clear this bit to pause the transmitter.
Description
w w w . d i g i e m b e d d e d . c o m
Setting the IE field to 1 enables the interrupt.
Setting the IE field to 0 disables the interrupt.
S e r i a l C o n t r o l l e r M o d u l e
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