NS7520B-1-I46 Digi International, NS7520B-1-I46 Datasheet - Page 30
NS7520B-1-I46
Manufacturer Part Number
NS7520B-1-I46
Description
IC ARM MICROPROCESSOR 177BGA
Manufacturer
Digi International
Series
NET+ARM®r
Specifications of NS7520B-1-I46
Applications
Network Processor
Core Processor
ARM7
Program Memory Type
External Program Memory
Controller Series
-
Ram Size
External
Interface
EBI/EMI, Ethernet, DMA, SPI, UART
Number Of I /o
16
Voltage - Supply
1.4 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
177-LFBGA
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
NS7520B-1-I46
Manufacturer:
Digi International
Quantity:
10 000
Part Number:
NS7520B-1-I46
Manufacturer:
NETARM
Quantity:
20 000
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Ethernet interface MAC
1 8
P i n o u t d e t a i l t a b l e s a n d s i g n a l d e s c r i p t i o n s
Table 5: Chip select controller signal description
Note:
In this table, GP designates general-purpose.
Table 6: Ethernet interface MAC pinout
OE_
MII
MDC
MDIO
TXCLK
TXD3
TXD2
TXD1
TXD0
TXER
TXEN
TXCOL
RXCRS
RXCLK
RXD3
Mnemonic
Symbol
N S 7 5 2 0 H a r d w a r e R e f e r e n c e , R e v G 9 / 2 0 0 7
ENDEC values for general-purpose output and TXD refer to bits in the
Ethernet General Control register. ENDEC values for general-purpose input
and RXD refer to bits in the Ethernet General Status register.
ENDEC
GP output
GP output
GP output
GP output
GP output
TXD
GP output
GP input
Output enable
Signal
D10
B10 U
C10
A12
B11
D11
A11
A13
B12
A14
D12
C12
D14
Pin
O
I/O
I
O
O
O
O
O
O
I
I
I
I
I/O
Active low signal that indicates that a memory read cycle is
in progress. This signal is activated only during read cycles
from peripherals controlled by one of the chip selects in the
memory module.
Description
2
2
2
2
2
2
2
2
OD
MII
MII management
clock
MII data
TX clock
TX data 3
TX data 2
TX data 1
TX data 0
TX code error
TX enable
Collision
Carrier sense
RX clock
RX data 3
Description
ENDEC
State of (LPBK bit XOR
(Mode=SEEQ))
State of UTP_STP bit
State of AUI_TP[0] bit
State of AUI_TP[1] bit
Inverted state of PDN bit,
open collector
Transmit data
State of LNK_DIS_ bit
Read state in bit 12
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