NS7520B-1-I46 Digi International, NS7520B-1-I46 Datasheet - Page 64

• Manufacturer Part Number: NS7520B-1-I46
• Description: IC ARM MICROPROCESSOR 177BGA
• Manufacturer: Digi International
• Series: NET+ARM®r

Specifications of NS7520B-1-I46

• Applications: Network Processor
• Core Processor: ARM7
• Program Memory Type: External Program Memory
• Controller Series: -
• Ram Size: External
• Interface: EBI/EMI, Ethernet, DMA, SPI, UART
• Number Of I /o: 16
• Voltage - Supply: 1.4 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 177-LFBGA
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PLL mode hardware configuration
5 2
U s i n g t h e P L L c i r c u i t
Figure 5, "PLL mode hardware configuration," on page 53, shows how the crystal is
connected to the XTALA1 and XTALA2 inputs.
Note:
Address lines A[8:0] configure the PLL circuit on bootup. Note that the values on
address lines A7, A6, A5, A4, and A2 are inverted in the PLL Settings register (see
"Setting the PLL frequency," beginning on page 54).
When the clock module is configured to use the PLL, the power to the
module must be cleaner than when using an external oscillator.
PLLVDD must be connected to 1.5V through a ferrite bead and bypassed with
a 100nF capacitor placed close to ball L15.
PLLVSS is connected to ground.
The PLLTST* input is pulled high to 3.3V through a 10K resistor. A two
position jumper Is used to GND it for boundary scan mode only. The clock
speed will be equal to the XTALA1 frequency. For normal/debug mode this
jumper is removed.
The BISTEN* input is tied to 3.3 volts through a 10K resistor.
The SCANEN* input is pulled high to 3.3V through a 10K resistor. A two
position jumper is used to connect it to system reset through an inverter.
For normal/debug mode the jumper is in place.
RESET* must have a rise time of 18nS from 0.8V to 2.0V. The MAX811 is in
this range. A RESET* source with a slow rise time can be used by using a
double inverter. The first inverter’s output connects to SCANEN* and to the
second inverter input. The second inverter’s output drives RESET*.
N S 7 5 2 0 H a r d w a r e R e f e r e n c e , R e v G 9 / 2 0 0 7
If boundary scan is not used, no jumpers are required. System reset
through the inverter is directly connected to SCANEN*.