NS7520B-1-I46 Digi International, NS7520B-1-I46 Datasheet - Page 35

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NS7520B-1-I46

Manufacturer Part Number
NS7520B-1-I46
Description
IC ARM MICROPROCESSOR 177BGA
Manufacturer
Digi International
Series
NET+ARM®r
Datasheets

Specifications of NS7520B-1-I46

Applications
Network Processor
Core Processor
ARM7
Program Memory Type
External Program Memory
Controller Series
-
Ram Size
External
Interface
EBI/EMI, Ethernet, DMA, SPI, UART
Number Of I /o
16
Voltage - Supply
1.4 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
177-LFBGA
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Table 9: GPIO pinout
Notes:
1
2
Signal descriptions
See Chapter 6, "GEN Module," for signal and configuration information for PORTA and
PORTC.
PORTC1
PORTC0
GPIO
signal
RESET output indicates the reset state of the NS7520. PORTC4 persists beyond
the negation of RESET_ for approximately 512 clock cycles if the PLL is disabled.
When the PLL is enabled, PORTC4 persists beyond the negation of RESET_ to
allow for PLL lock for 100 microseconds times the ratio of the VCO to XTALA.
Note that this GPIO is left in output mode active following a hardware
RESET.
*PORTC[3:0] pins provide level-sensitive interrupts. The inputs do not need to
be synchronous to any clock. The interrupt remains active until cleared by a
change in the input signal level.
2
2
CTSB_
TXCB/
OUT2B_/
DCDB_
Serial
signal
LIRQ1/
DONE2_
(O)
LIRQ0/
DONE2_(I)
Other
signal
E12 U
E14 U
Pin
I/O
I/O
I/O
w w w . d i g i e m b e d d e d . c o m
2
2
OD
Channel 2 CTS_
Pgm’able Out/
Channel 2 DCD/
Channel 2 SPI
enable (SEL_)/
Channel 2
TXCLK
Serial channel
description
P i n o u t a n d P a c k a g i n g
Level sensitive
IRQ/DMA
channel 4/6
DONE_out
Level sensitive
IRQ/DMA
channel 4/6
DONE_in
Other
description
2 3

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