NS7520B-1-I46 Digi International, NS7520B-1-I46 Datasheet - Page 246

• Manufacturer Part Number: NS7520B-1-I46
• Description: IC ARM MICROPROCESSOR 177BGA
• Manufacturer: Digi International
• Series: NET+ARM®r

Specifications of NS7520B-1-I46

• Applications: Network Processor
• Core Processor: ARM7
• Program Memory Type: External Program Memory
• Controller Series: -
• Ram Size: External
• Interface: EBI/EMI, Ethernet, DMA, SPI, UART
• Number Of I /o: 16
• Voltage - Supply: 1.4 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 177-LFBGA
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

2 3 4
S e r i a l C h a n n e l r e g i s t e r s
Register bit assignment
Table 89: Serial Channel Status Register A bit definition
D31
D30
D29
D28
Bits
RBRK
15
31
1
RFE
30
14
2
MATCH
R
R
R
R
Access
N S 7 5 2 0 H a r d w a r e R e f e r e n c e , R e v G 9 / 2 0 0 7
RPE
29
13
3
ROVER RRDY
28
12
4
MATCH1
MATCH2
MATCH3
MATCH4
Mnemonic
BGAP
27
11
RHALF
CGAP
26
10
RBC
25
9
0
0
0
0
Reset
RFULL
24
8
Reserved
Character Match1
Character Match2
Character Match3
Character Match4
Set when a MATCH character is configured in the
Receive Match register at the same time the enable
receive data match bit is set in Serial Channel Control
Register B. The MATCH bit indicates that a data
match was found in the receive data stream, and the
current receive data buffer has been closed. The last
character in the receive data buffer contains the actual
MATCH character.
When the receiver is configured for DMA operation,
the MATCH status bits are written automatically to
the DMA receive buffer descriptor’s status field.
When not using DMA, the MATCH fields are valid
only while the RBC bit in this register is set.
Description
DCDI
23
7
22
RII
6
DSRI
21
5
RXFDB
CTSI
20
4
TRDY
DCD
19
3
THALF
18
RI
2
DSR
TBC
17
1
EMPTY
CTS
16
0
T