NS7520B-1-I46 Digi International, NS7520B-1-I46 Datasheet - Page 185

• Manufacturer Part Number: NS7520B-1-I46
• Description: IC ARM MICROPROCESSOR 177BGA
• Manufacturer: Digi International
• Series: NET+ARM®r

Specifications of NS7520B-1-I46

• Applications: Network Processor
• Core Processor: ARM7
• Program Memory Type: External Program Memory
• Controller Series: -
• Ram Size: External
• Interface: EBI/EMI, Ethernet, DMA, SPI, UART
• Number Of I /o: 16
• Voltage - Supply: 1.4 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 177-LFBGA
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Ethernet Receive Status register
Address: FF80 0014
The Ethernet Receive Status register contains the status for the last completed
receive buffer. The receive buffer complete bit (RXBR) is set in the Ethernet General
Status register when a receive frame is completed and the Receive Status register is
loaded. The lower 16 bits (D15:00) of the register are also loaded into the
StatusOrIndex field of the DMA buffer descriptor when using DMA mode.
Register bit assignment
Table 59: Ethernet Receive Status register bit definition
D31:16
D15
Bits
RXCE
15
31
RXDV
30
14
R
R
Access
RXOK
29
13
RXBR
28
12
RXSIZE
RXCE
Mnemonic
RXMC
27
11
CRC
26
10
RX
0
0
RXDR
Reset
25
9
RXCV
24
8
RXSIZE
Receive buffer size in bytes
Provides the number of bytes contained in the next packet
to be read from the Ethernet receive FIFO.
When using DMA mode, the RXSIZE field is also copied
to the buffer length field in the DMA buffer descriptor.
Receive carrier event previously seen
Set to 1 to indicate that the MAC received a carrier event
from the Ethernet PHY since the last time a receive packet
event was recorded in this status register. The carrier event
is not associated with this particular packet.
A carrier event is defined as any activity on the receive
channel that does not result in a packet receive attempt.
Description
w w w . d i g i e m b e d d e d . c o m
LNG
23
RX
7
SHT
RX
22
6
ROVER
21
5
20
4
19
3
E t h e r n e t M o d u l e
Reserved
18
2
17
1
16
0
1 7 3